ATMEGA16L-8AI Atmel, ATMEGA16L-8AI Datasheet - Page 273
![IC AVR MCU 16K LV 8MHZ IND44TQFP](/photos/6/70/67042/313-44-tqfp_sml.jpg)
ATMEGA16L-8AI
Manufacturer Part Number
ATMEGA16L-8AI
Description
IC AVR MCU 16K LV 8MHZ IND44TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA16L-8AI
Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA16L-8AI
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
- Current page: 273 of 357
- Download datasheet (8Mb)
Serial
Downloading
SPI Serial
Programming Pin
Mapping
2466T–AVR–07/10
Table 113. Parallel Programming Characteristics, V
Notes:
Both the Flash and EEPROM memory arrays can be programmed using the serial SPI bus while
RESET is pulled to GND. The serial interface consists of pins SCK, MOSI (input), and MISO
(output). After RESET is set low, the Programming Enable instruction needs to be executed first
before program/erase operations can be executed. NOTE, in
mapping for SPI programming is listed. Not all parts use the SPI pins dedicated for the internal
SPI interface.
Table 114. Pin Mapping SPI Serial Programming
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
DVXH
XLXH
XHXL
XLDX
XLWL
XLPH
PLXH
BVPH
PHPL
PLBX
WLBX
PLWL
BVWL
WLWH
WLRL
WLRH
WLRH_CE
XLOL
BVDV
OLDV
OHDZ
Symbol
1.
2. t
MOSI
MISO
SCK
commands.
t
WLRH_CE
WLRH
Parameter
Data and Control Valid before XTAL1 High
XTAL1 Low to XTAL1 High
XTAL1 Pulse Width High
Data and Control Hold after XTAL1 Low
XTAL1 Low to WR Low
XTAL1 Low to PAGEL high
PAGEL low to XTAL1 high
BS1 Valid before PAGEL High
PAGEL Pulse Width High
BS1 Hold after PAGEL Low
BS2/1 Hold after WR Low
PAGEL Low to WR Low
BS1 Valid to WR Low
WR Pulse Width Low
WR Low to RDY/BSY Low
WR Low to RDY/BSY High
WR Low to RDY/BSY High for Chip Erase
XTAL1 Low to OE Low
BS1 Valid to DATA valid
OE Low to DATA Valid
OE High to DATA Tri-stated
is valid for the Write Flash, Write EEPROM, Write Fuse bits and Write Lock bits
is valid for the Chip Erase command.
Pins
PB5
PB6
PB7
(1)
I/O
O
I
I
(2)
CC
Description
Serial Data in
Serial Data out
Serial Clock
= 5V ±10% (Continued)
Min
200
150
150
150
150
3.7
7.5
67
67
67
67
67
67
67
0
0
0
0
0
Table 114 on page
Typ
ATmega16(L)
Max
250
250
250
4.5
1
9
Units
ms
ns
μs
ns
273, the pin
273
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