ATMEGA8515-16PC Atmel, ATMEGA8515-16PC Datasheet - Page 68
![IC AVR MCU 8K 16MHZ COM 40-DIP](/photos/6/70/67049/453-40-dip_sml.jpg)
ATMEGA8515-16PC
Manufacturer Part Number
ATMEGA8515-16PC
Description
IC AVR MCU 8K 16MHZ COM 40-DIP
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA8515-16PC
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
EBI/EMI, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
40-DIP (0.600", 15.24mm)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Data Converters
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• MOSI – Port B, Bit 5
MOSI: SPI Master Data output, Slave Data input for SPI channel. When the SPI is
enabled as a Slave, this pin is configured as an input regardless of the setting of DDB5.
When the SPI is enabled as a Master, the data direction of this pin is controlled by
DDB5. When the pin is forced by the SPI to be an input, the pull-up can still be con-
trolled by the PORTB5 bit.
• SS – Port B, Bit 4
SS: Slave Select input. When the SPI is enabled as a Slave, this pin is configured as an
input regardless of the setting of DDB4. As a Slave, the SPI is activated when this pin is
driven low. When the SPI is enabled as a Master, the data direction of this pin is con-
trolled by DDB4. When the pin is forced by the SPI to be an input, the pull-up can still be
controlled by the PORTB4 bit.
• AIN1 – Port B, Bit 3
AIN1, Analog Comparator Negative input. Configure the port pin as input with the inter-
nal pull-up switched off to avoid the digital port function from interfering with the function
of the Analog Comparator.
• AIN0 – Port B, Bit 2
AIN0, Analog Comparator Positive input. Configure the port pin as input with the internal
pull-up switched off to avoid the digital port function from interfering with the function of
the Analog Comparator.
• T1 – Port B, Bit 1
T1, Timer/Counter1 Counter Source.
• T0/OC0 – Port B, Bit 0
T0, Timer/Counter0 Counter Source.
OC0, Output Compare Match output: The PB0 pin can serve as an external output for
the Timer/Counter0 Compare Match. The PB0 pin has to be configured as an output
(DDB0 set (one)) to serve this function. The OC0 pin is also the output pin for the PWM
mode timer function.
Table 31 relate the alternate functions of Port B to the overriding signals shown in Figure
33 on page 64. SPI MSTR INPUT and SPI SLAVE OUTPUT constitute the MISO signal,
while MOSI is divided into SPI MSTR OUTPUT and SPI SLAVE INPUT.
ATmega8515(L)
68
2512K–AVR–01/10
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