ATMEGA8515-16JC Atmel, ATMEGA8515-16JC Datasheet - Page 50
![IC AVR MCU 8K 16MHZ COM 44-PLCC](/photos/6/70/67043/453-44-plcc_sml.jpg)
ATMEGA8515-16JC
Manufacturer Part Number
ATMEGA8515-16JC
Description
IC AVR MCU 8K 16MHZ COM 44-PLCC
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA8515-16JC
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
EBI/EMI, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
44-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
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Internal Voltage
Reference
Voltage Reference Enable
Signals and Start-up Time
Watchdog Timer
50
ATmega8515(L)
ATmega8515 features an internal bandgap reference. This reference is used for Brown-
out Detection, and it can be used as an input to the Analog Comparator.
The voltage reference has a start-up time that may influence the way it should be used.
The start-up time is given in Table 19. To save power, the reference is not always turned
on. The reference is on during the following situations:
1. When the BOD is enabled (by programming the BODEN Fuse).
2. When the bandgap reference is connected to the Analog Comparator (by setting
Thus, when the BOD is not enabled, after setting the ACBG bit, the user must always
allow the reference to start up before the output from the Analog Comparator is used. To
reduce power consumption in Power-down mode, the user can avoid the two conditions
above to ensure that the reference is turned off before entering Power-down mode.
Table 19. Internal Voltage Reference Characteristics
The Watchdog Timer is clocked from a separate On-chip Oscillator which runs at
1 MHz. This is the typical frequency at V
values at other V
Reset interval can be adjusted as shown in Table 21 on page 52. The WDR – Watchdog
Reset – instruction resets the Watchdog Timer. The Watchdog Timer is also reset when
it is disabled and when a Chip Reset occurs. Eight different clock cycle periods can be
selected to determine the reset period. If the reset period expires without another
Watchdog Reset, the ATmega8515 resets and executes from the Reset Vector. For tim-
ing details on the Watchdog Reset, refer to page 49.
To prevent unintentional disabling of the Watchdog or unintentional change of time-out
period, three different safety levels are selected by the Fuses S8515C and WDTON as
shown in Table 20. Safety level 0 corresponds to the setting in AT90S4414/8515. There
is no restriction on enabling the WDT in any of the safety levels. Refer to “Timed
Sequences for Changing the Configuration of the Watchdog Timer” on page 53 for
details.
Symbol
V
the ACBG bit in ACSR).
t
I
BG
BG
BG
Parameter
Bandgap reference voltage
Bandgap reference start-up time
Bandgap reference current consumption
CC
levels. By controlling the Watchdog Timer prescaler, the Watchdog
CC
= 5V. See characterization data for typical
1.15
Min
1.23
Typ
40
10
Max
1.35
70
2512K–AVR–01/10
Units
µA
µs
V
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