PIC18F452-I/LG Microchip Technology, PIC18F452-I/LG Datasheet - Page 223
PIC18F452-I/LG
Manufacturer Part Number
PIC18F452-I/LG
Description
IC MCU FLASH 16KX16 W/AD 44PLCC
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F242-ISO.pdf
(332 pages)
3.PIC18F242-ISO.pdf
(14 pages)
4.PIC18F242-ISO.pdf
(16 pages)
5.PIC18F242-ISO.pdf
(16 pages)
6.PIC18F242-ISO.pdf
(14 pages)
7.PIC18LF242-ISO.pdf
(36 pages)
Specifications of PIC18F452-I/LG
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
34
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-PLCC
For Use With
XLT44L2 - SOCKET TRAN ICE 44PLCCDVA16XL441 - ADAPTER DEVICE ICE 44PLCC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- PIC16F616T-ISL PDF datasheet
- PIC18F242-ISO PDF datasheet #2
- PIC18F242-ISO PDF datasheet #3
- PIC18F242-ISO PDF datasheet #4
- PIC18F242-ISO PDF datasheet #5
- PIC18F242-ISO PDF datasheet #6
- PIC18LF242-ISO PDF datasheet #7
- Current page: 223 of 332
- Download datasheet (6Mb)
BNC
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
© 2006 Microchip Technology Inc.
Q Cycle Activity:
If Jump:
If No Jump:
Before Instruction
After Instruction
operation
Decode
Decode
PC
If Carry
If Carry
No
Q1
Q1
PC
PC
Read literal
Read literal
operation
Branch if Not Carry
[ label ] BNC
-128
if carry bit is ’0’
(PC) + 2 + 2n
None
If the Carry bit is ’0’, then the
program will branch.
The 2’s complement number ’2n’ is
added to the PC. Since the PC will
have incremented to fetch the next
instruction, the new address will be
PC+2+2n. This instruction is then
a two-cycle instruction.
1
1(2)
HERE
1110
No
Q2
Q2
'n'
'n'
=
=
=
=
=
n
address (HERE)
0;
address (Jump)
1;
address (HERE+2)
127
0011
BNC
operation
Process
Process
Data
Data
No
Q3
Q3
n
PC
Jump
nnnn
Write to PC
operation
operation
No
No
Q4
Q4
nnnn
BNN
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
Q Cycle Activity:
If Jump:
If No Jump:
Before Instruction
After Instruction
operation
Decode
Decode
No
PC
If Negative
If Negative
Q1
Q1
PC
PC
Read literal
Read literal
operation
Branch if Not Negative
[ label ] BNN
-128
if negative bit is ’0’
(PC) + 2 + 2n
None
If the Negative bit is ’0’, then the
program will branch.
The 2’s complement number ’2n’ is
added to the PC. Since the PC will
have incremented to fetch the next
instruction, the new address will be
PC+2+2n. This instruction is then
a two-cycle instruction.
1
1(2)
HERE
1110
No
Q2
Q2
'n'
'n'
=
=
=
=
=
PIC18FXX2
n
address (HERE)
0;
address (Jump)
1;
address (HERE+2)
127
0111
BNN
operation
Process
Process
Data
Data
No
Q3
Q3
n
DS39564C-page 221
PC
Jump
nnnn
Write to PC
operation
operation
No
No
Q4
Q4
nnnn
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