PIC18F452-I/LG Microchip Technology, PIC18F452-I/LG Datasheet - Page 2
![IC MCU FLASH 16KX16 W/AD 44PLCC](/photos/6/63/66325/150-44-plcc_sml.jpg)
PIC18F452-I/LG
Manufacturer Part Number
PIC18F452-I/LG
Description
IC MCU FLASH 16KX16 W/AD 44PLCC
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F242-ISO.pdf
(332 pages)
3.PIC18F242-ISO.pdf
(14 pages)
4.PIC18F242-ISO.pdf
(16 pages)
5.PIC18F242-ISO.pdf
(16 pages)
6.PIC18F242-ISO.pdf
(14 pages)
7.PIC18LF242-ISO.pdf
(36 pages)
Specifications of PIC18F452-I/LG
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
34
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-PLCC
For Use With
XLT44L2 - SOCKET TRAN ICE 44PLCCDVA16XL441 - ADAPTER DEVICE ICE 44PLCC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
PIC18FXX2
3. Module: Data EEPROM
EXAMPLE 1:
DS80122K-page 2
BCF
BSF
MOVF
BSF
When reading the data EEPROM, the contents of
the EEDATA register may become corrupted in the
second instruction cycle after the RD bit
(EECON1<0>) is set. The actual contents of the
EEPROM remains unaffected.
Work around
To ensure the integrity of the contents of EEDATA,
the register must be read in the instruction imme-
diately following the setting of the RD bit. Use the
MOVF or MOVFF instructions to do this (see
Example 1).
Additionally, all interrupts must be disabled prior to
the read instruction sequence. Interruptions of the
sequence may have the same result of altering the
contents of EEDATA.
Date Codes that pertain to this issue:
All engineering and production devices.
•
•
•
•
INTCON,GIEH ;disable interrupts
EECON1,RD
EEDATA,W
INTCON,GIEH ;enable interrupts
SUGGESTED SEQUENCE
FOR READING EEDATA
;if using interrupts
;start the read operation
;move the data out of
;EEDATA
;if using interrupts
4. Module: Interrupts
Note:
Under certain conditions, the use of dual priority
interrupts may cause a program instruction to be
skipped entirely. This has only been observed
when both of the following apply:
• Both high and low interrupts are enabled, and
• A high priority asynchronous interrupt occurs in
The event causes the stack to get pushed twice,
and will eventually result in an overflow.
Work around
Two possible solutions are presented. Other
solutions may exist.
1. Enable only high priority interrupts for all
2. If it is necessary to use both high and low
Date Codes that pertain to this issue:
All engineering and production devices.
the following cycle after any low priority
interrupts.
sources, both synchronous and asynchronous.
interrupt priorities:
• Assign asynchronous interrupts as low
• Assign synchronous interrupts to both high
priority only.
and low priority, as needed.
This does not apply to the INT0 (external)
interrupt as it is always configured as a
high priority interrupt.
© 2005 Microchip Technology Inc.