PIC16F77-I/LG Microchip Technology, PIC16F77-I/LG Datasheet - Page 14
![IC MCU FLASH 8KX14 W/AD 44PLCC](/photos/6/63/66325/150-44-plcc_sml.jpg)
PIC16F77-I/LG
Manufacturer Part Number
PIC16F77-I/LG
Description
IC MCU FLASH 8KX14 W/AD 44PLCC
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F688T-ISL.pdf
(688 pages)
3.PIC16F818-ISO.pdf
(6 pages)
4.PIC16F73-ISP.pdf
(174 pages)
5.PIC16F73-ISP.pdf
(14 pages)
6.PIC16F73-ISP.pdf
(12 pages)
Specifications of PIC16F77-I/LG
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
33
Program Memory Size
14KB (8K x 14)
Program Memory Type
FLASH
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-PLCC
For Use With
DVA16XL441 - ADAPTER DEVICE ICE 44PLCC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
- PIC16F616T-ISL PDF datasheet
- PIC16F688T-ISL PDF datasheet #2
- PIC16F818-ISO PDF datasheet #3
- PIC16F73-ISP PDF datasheet #4
- PIC16F73-ISP PDF datasheet #5
- PIC16F73-ISP PDF datasheet #6
- Current page: 14 of 174
- Download datasheet (5Mb)
PIC16F7X
TABLE 1-3:
DS30325B-page 12
RD0/PSP0
RD1/PSP1
RD2/PSP2
RD3/PSP3
RD4/PSP4
RD5/PSP5
RD6/PSP6
RD7/PSP7
RE0/RD/AN5
RE1/WR/AN6
RE2/CS/AN7
V
V
NC
Legend:
Note 1: This buffer is a Schmitt Trigger input when configured as an external interrupt.
SS
DD
RD0
PSP0
RD1
PSP1
RD2
PSP2
RD3
PSP3
RD4
PSP4
RD5
PSP5
RD6
PSP6
RD7
PSP7
RE0
RD
AN5
RE1
WR
AN6
RE2
CS
AN7
Pin Name
2:
3:
4:
This buffer is a Schmitt Trigger input when used in Serial Programming mode.
This buffer is a Schmitt Trigger input when configured as general purpose I/O and a TTL input when used in the Parallel
Slave Port mode (for interfacing to a microprocessor bus).
This buffer is a Schmitt Trigger input when configured in RC Oscillator mode and a CMOS input otherwise.
I = input
— = Not used
PIC16F74 AND PIC16F77 PINOUT DESCRIPTION (CONTINUED)
12,31
11,32
Pin#
DIP
19
20
21
22
27
28
29
30
10
—
8
9
PLCC
1,17,2
13,34
12,35
8, 40
Pin#
O = output
TTL = TTL input
21
22
23
24
30
31
32
33
10
11
9
12,13,
33, 34
Pin#
QFP
6,29
7,28
38
39
40
41
25
26
27
2
3
4
5
I/O/P
Type
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
P
P
I
I
I
I
I
I
I
I
I/O = input/output
ST = Schmitt Trigger input
ST/TTL
ST/TTL
ST/TTL
ST/TTL
ST/TTL
ST/TTL
ST/TTL
ST/TTL
ST/TTL
ST/TTL
ST/TTL
Buffer
Type
—
—
—
(3)
(3)
(3)
(3)
(3)
(3)
(3)
(3)
(3)
(3)
(3)
PORTD is a bi-directional I/O port or parallel slave port
when interfacing to a microprocessor bus.
PORTE is a bi-directional I/O port.
Ground reference for logic and I/O pins.
Positive supply for logic and I/O pins.
These pins are not internally connected. These pins should
be left unconnected.
Digital I/O.
Parallel Slave Port data.
Digital I/O.
Parallel Slave Port data.
Digital I/O.
Parallel Slave Port data.
Digital I/O.
Parallel Slave Port data.
Digital I/O.
Parallel Slave Port data.
Digital I/O.
Parallel Slave Port data.
Digital I/O.
Parallel Slave Port data.
Digital I/O.
Parallel Slave Port data.
Digital I/O.
Read control for parallel slave port .
Analog input 5.
Digital I/O.
Write control for parallel slave port .
Analog input 6.
Digital I/O.
Chip select control for parallel slave port .
Analog input 7.
P = power
Description
2002 Microchip Technology Inc.
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