ATMEGA162-16PI Atmel, ATMEGA162-16PI Datasheet - Page 18
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ATMEGA162-16PI
Manufacturer Part Number
ATMEGA162-16PI
Description
IC MCU AVR 16K 5V 16MHZ 40-DIP
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA162-16PI
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
EBI/EMI, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
40-DIP (0.600", 15.24mm)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Data Converters
-
Errata
ATmega162, all
rev.
18
ATmega162/V
The revision letter in this section refers to the revision of the ATmega162 device.
There are no errata for this revision of ATmega162. However, a proposal for solving problems
regarding the JTAG instruction IDCODE is presented below.
•
•
•
1. IDCODE masks data from TDI input
2. Reading EEPROM by using ST or STS to set EERE bit triggers unexpected interrupt
3. Interrupts may be lost when writing the timer register in asynchronous timer
IDCODE masks data from TDI input
Reading EEPROM by using ST or STS to set EERE bit triggers unexpected interrupt request
Interrupts may be lost when writing the timer register in asynchronous timer
The public but optional JTAG instruction IDCODE is not implemented correctly according to
IEEE1149.1; a logic one is scanned into the shift register instead of the TDI input while shift-
ing the Device ID Register. Hence, captured data from the preceding devices in the
boundary scan chain are lost and replaced by all-ones, and data to succeeding devices are
replaced by all-ones during Update-DR.
If ATmega162 is the only device in the scan chain, the problem is not visible.
Problem Fix / Workaround
Select the Device ID Register of the ATmega162 (Either by issuing the IDCODE instruction
or by entering the Test-Logic-Reset state of the TAP controller) to read out the contents of
its Device ID Register and possibly data from succeeding devices of the scan chain. Note
that data to succeeding devices cannot be entered during this scan, but data to preceding
devices can. Issue the BYPASS instruction to the ATmega162 to select its Bypass Register
while reading the Device ID Registers of preceding devices of the boundary scan chain.
Never read data from succeeding devices in the boundary scan chain or upload data to the
succeeding devices while the Device ID Register is selected for the ATmega162. Note that
the IDCODE instruction is the default instruction selected by the Test-Logic-Reset state of
the TAP-controller.
Alternative Problem Fix / Workaround
If the Device IDs of all devices in the boundary scan chain must be captured simultaneously
(for instance if blind interrogation is used), the boundary scan chain can be connected in
such way that the ATmega162 is the first device in the chain. Update-DR will still not work
for the succeeding devices in the boundary scan chain as long as IDCODE is present in the
JTAG Instruction Register, but the Device ID registered cannot be uploaded in any case.
request.
Reading EEPROM by using the ST or STS command to set the EERE bit in the EECR reg-
ister triggers an unexpected EEPROM interrupt request.
Problem Fix / Workaround
Always use OUT or SBI to set EERE in EECR.
The interrupt will be lost if a timer register that is synchronous timer clock is written when the
asynchronous Timer/Counter register (TCNTx) is 0x00.
Problem Fix / Workaround
Always check that the asynchronous Timer/Counter register neither have the value 0xFF nor
0x00 before writing to the asynchronous Timer Control Register (TCCRx), asynchronous
Timer Counter Register (TCNTx), or asynchronous Output Compare Register (OCRx).
2513KS–AVR–07/09