ATMEGA162L-8AI Atmel, ATMEGA162L-8AI Datasheet - Page 131
ATMEGA162L-8AI
Manufacturer Part Number
ATMEGA162L-8AI
Description
IC MCU AVR 16K 3V 8MHZ 44-TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA162L-8AI
Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
EBI/EMI, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Data Converters
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Timer/Counter1 – TCNT1H and
TCNT1L
Timer/Counter3 – TCNT3H and
TCNT3L
Output Compare Register 1 A
– OCR1AH and OCR1AL
Output Compare Register 1 B
– OCR1BH and OCR1BL
Output Compare Register 3 A
– OCR3AH and OCR3AL
Output Compare Register 3 B
– OCR3BH and OCR3BL
2513C–AVR–09/02
The two Timer/Counter I/O locations (TCNTnH and TCNTnL, combined TCNTn) give
direct access, both for read and for write operations, to the Timer/Counter unit 16-bit
counter. To ensure that both the high and low bytes are read and written simultaneously
when the CPU accesses these registers, the access is performed using an 8-bit tempo-
rary high byte register (TEMP). This temporary register is shared by all the other 16-bit
registers. See “Accessing 16-bit Registers” on page 107.
Modifying the counter (TCNTn) while the counter is running introduces a risk of missing
a compare match between TCNTn and one of the OCRnx Registers.
Writing to the TCNTn Register blocks (removes) the compare match on the following
timer clock for all compare units.
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
R/W
R/W
R/W
R/W
R/W
R/W
7
0
7
0
7
0
7
0
7
0
7
0
R/W
R/W
R/W
R/W
R/W
R/W
6
0
6
0
6
0
6
0
6
0
6
0
R/W
R/W
R/W
R/W
R/W
R/W
5
0
5
0
5
0
5
0
5
0
5
0
R/W
R/W
R/W
R/W
R/W
R/W
OCR1A[15:8]
OCR1B[15:8]
OCR3A[15:8]
OCR3B[15:8]
4
TCNT1[15:8]
0
4
TCNT3[15:8]
0
4
0
4
0
4
0
4
0
OCR1A[7:0]
OCR1B[7:0]
OCR3A[7:0]
OCR3B[7:0]
TCNT1[7:0]
TCNT3[7:0]
R/W
R/W
R/W
R/W
R/W
R/W
3
0
3
0
3
0
3
0
3
0
3
0
ATmega162(V/U/L)
R/W
R/W
R/W
R/W
R/W
R/W
2
0
2
0
2
0
2
0
2
0
2
0
R/W
R/W
R/W
R/W
R/W
R/W
1
0
1
0
1
0
1
0
1
0
1
0
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0
0
0
0
0
OCR1AH
OCR1AL
OCR1BH
OCR1BL
OCR3AH
OCR3AL
OCR3BH
OCR3BL
TCNT1H
TCNT3H
TCNT1L
TCNT3L
131
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