PIC16F77-E/ML Microchip Technology, PIC16F77-E/ML Datasheet - Page 681
![IC MCU FLASH 8KX14 A/D 44QFN](/photos/6/81/68122/150-44-qfn_sml.jpg)
PIC16F77-E/ML
Manufacturer Part Number
PIC16F77-E/ML
Description
IC MCU FLASH 8KX14 A/D 44QFN
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F688T-ISL.pdf
(688 pages)
3.PIC16F818-ISO.pdf
(6 pages)
4.PIC16F73-ISP.pdf
(174 pages)
5.PIC16F73-ISP.pdf
(14 pages)
6.PIC16F73-ISP.pdf
(12 pages)
Specifications of PIC16F77-E/ML
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
33
Program Memory Size
14KB (8K x 14)
Program Memory Type
FLASH
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
44-QFN
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
368 B
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
33
Number Of Timers
3 bit
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
ICE2000, DM163022
Minimum Operating Temperature
- 40 C
On-chip Adc
8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
- PIC16F616T-ISL PDF datasheet
- PIC16F688T-ISL PDF datasheet #2
- PIC16F818-ISO PDF datasheet #3
- PIC16F73-ISP PDF datasheet #4
- PIC16F73-ISP PDF datasheet #5
- PIC16F73-ISP PDF datasheet #6
- Current page: 681 of 688
- Download datasheet (3Mb)
Glossary
P
Pages
Method of addressing the Program Memory. Midrange devices have 11-bit addressing for
CALL
and
instructions, which gives these instructions a 2-Kword reach. To allow more program
GOTO
memory to be present on a device, program memory is partitioned into contiguous pages, where
each page is 2-Kwords. To select the desired page, the page selection bits (PCLATCH<5:4>)
need to be appropriately configured. Since there are presently 2 page selection bits, 4 pages can
be implemented.
Parallel Slave Port (PSP)
A parallel communication port which is used to interface to a microprocessor’s 8-bit data bus.
POP
A termed used to refer to the action of restoring information from a stack (software and/or hard-
ware). See PUSH.
Postscaler
A circuit that slows the rate of the interrupt generation (or WDT reset) from a counter/timer by
dividing it down.
Power-on Reset POR)
Circuitry which determines if the device voltage rose from a powered down level (0V). If the
device voltage is rising from ground, a device reset occurs and the PWRT is started.
Power-up Timer (PWRT)
A timer which holds the internal reset signal low for a timed delay to allow the device voltage to
reach the valid operating voltage range. Once the timer times out, the OST circuitry is enabled
(for all crystal/resonator device oscillator modes).
Prescaler
A circuit that slows the rate of a clocking source to a counter/timer.
Program Bus
The bus which is used to transfer instruction words form the program memory to the CPU.
Program Counter
A register which specifies the address in program memory that is the next instruction to execute.
Program Memory
Any memory that is one the program memory bus. Static variables may be contained in program
memory (such as tables).
PSP
See Parallel Slave Port.
Pulse Width Modulation (PWM)
A serial signal in which the information is contained in the width of a (high) pulse of a constant
frequency signal. A PWM output, from the CCP module, of the same duty cycle requires no soft-
ware overhead.
PUSH
35
A termed used to refer to the action of saving information onto a stack (software and/or hard-
ware). See POP.
PWM
Pulse Width Modulation.
1997 Microchip Technology Inc.
DS31035A-page 35-9
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