PIC18LF4539T-I/ML Microchip Technology, PIC18LF4539T-I/ML Datasheet - Page 184
![IC MCU FLASH 12KX16 EE A/D 44QFN](/photos/6/81/68122/150-44-qfn_sml.jpg)
PIC18LF4539T-I/ML
Manufacturer Part Number
PIC18LF4539T-I/ML
Description
IC MCU FLASH 12KX16 EE A/D 44QFN
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16LF627A-IP.pdf
(8 pages)
2.PIC18F2439-ISO.pdf
(322 pages)
3.PIC18F2439-ISO.pdf
(6 pages)
Specifications of PIC18LF4539T-I/ML
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
24KB (12K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
1408 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFN
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1408 B
Interface Type
I2C, SPI, AUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
32
Number Of Timers
16 bit
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
DV164005, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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PIC18FXX39
REGISTER 18-2:
DS30485A-page 182
bit 7
bit 6
bit 5-4
bit 3-0
ADFM: A/D Result Format Select bit
1 = Right justified. Six (6) Most Significant bits of ADRESH are read as ’0’.
0 = Left justified. Six (6) Least Significant bits of ADRESL are read as ’0’.
ADCS2: A/D Conversion Clock Select bit (ADCON1 bits in bold)
Unimplemented: Read as '0'
PCFG3:PCFG0: A/D Port Configuration Control bits
Legend:
R = Readable bit
- n = Value at POR
bit 7
A = Analog input
C/R = # of analog input channels / # of A/D voltage references
<ADCS2>
Note:
ADCON1
PCFG
<3:0>
0000
0001
0010
0011
0100
0101
011x
1000
1001
1010
1011
1100
1101
1110
1111
ADFM
R/W-0
ADCON1 REGISTER
0
0
0
0
1
1
1
1
AN7
On any device RESET, the port pins that are multiplexed with analog functions (ANx) are
forced to be an analog input.
D
D
D
D
D
D
D
D
D
D
D
D
A
A
A
<ADCS1:ADCS0>
ADCS2
R/W-0
ADCON0
AN6
D
D
D
D
D
D
D
D
D
D
D
D
A
A
A
D = Digital I/O
00
01
10
11
00
01
10
11
AN5
D
D
D
D
D
D
D
D
D
A
A
A
A
A
A
W = Writable bit
‘1’ = Bit is set
U-0
—
Preliminary
AN4
D
D
D
D
D
D
F
F
F
F
F
F
F
F
A
A
A
A
A
A
A
A
A
OSC
OSC
OSC
RC
OSC
OSC
OSC
RC
(clock derived from the internal A/D RC oscillator)
(clock derived from the internal A/D RC oscillator)
/2
/8
/32
/4
/16
/64
V
V
V
V
V
V
V
V
V
AN3
REF
REF
REF
REF
REF
REF
REF
REF
REF
A
A
A
D
A
D
U-0
—
+
+
+
+
+
+
+
+
+
V
V
V
V
V
AN2
REF
REF
REF
REF
REF
D
D
D
D
A
A
A
A
A
A
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
-
-
-
-
-
PCFG3
R/W-0
Clock Conversion
AN1
D
D
D
A
A
A
A
A
A
A
A
A
A
A
A
AN0
PCFG2
R/W-0
A
A
A
A
A
A
D
A
A
A
A
A
A
A
A
2002 Microchip Technology Inc.
V
AN3
AN3
AN3
AN3
AN3
AN3
AN3
AN3
AN3
V
V
V
V
V
REF
—
DD
DD
DD
DD
DD
x = Bit is unknown
+
PCFG1
R/W-0
V
AN2
AN2
AN2
AN2
AN2
V
V
V
V
V
V
V
V
V
REF
—
SS
SS
SS
SS
SS
SS
SS
SS
SS
-
PCFG0
R/W-0
C / R
8 / 0
7 / 1
5 / 0
4 / 1
3 / 0
2 / 1
0 / 0
6 / 2
6 / 0
5 / 1
4 / 2
3 / 2
2 / 2
1 / 0
1 / 2
bit 0
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