PIC16LF819T-I/SOG Microchip Technology, PIC16LF819T-I/SOG Datasheet - Page 45

• Manufacturer Part Number: PIC16LF819T-I/SOG
• Description: IC MCU FLASH 2KX14 18SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16LF819T-I/SOG

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: I²C, SPI
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Size: 3.5KB (2K x 14)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 5x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 18-SOIC (7.5mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

4.2
The MCLR pin provides a method for triggering an
external Reset of the device. A Reset is generated by
holding the pin low. These devices have a noise filter in
the MCLR Reset path which detects and ignores small
pulses.
The MCLR pin is not driven low by any internal Resets,
including the WDT.
In PIC18F2450/4450 devices, the MCLR input can be
disabled with the MCLRE Configuration bit. When
MCLR is disabled, the pin becomes a digital input. See
Section 9.5 “PORTE, TRISE and LATE Registers”
for more information.
4.3
A Power-on Reset pulse is generated on-chip
whenever V
allows the device to start in the initialized state when
V
To take advantage of the POR circuitry, tie the MCLR pin
through a resistor (1 kΩ to 10 kΩ) to V
eliminate external RC components usually needed to
create a Power-on Reset delay. A minimum rise rate for
V
Characteristics”). For a slow rise time, see Figure 4-2.
When the device starts normal operation (i.e., exits the
Reset condition), device operating parameters (volt-
age, frequency, temperature, etc.) must be met to
ensure operation. If these conditions are not met, the
device must be held in Reset until the operating
conditions are met.
POR events are captured by the POR bit (RCON<1>).
The state of the bit is set to ‘0’ whenever a Power-on
Reset occurs; it does not change for any other Reset
event. POR is not reset to ‘1’ by any hardware event.
To capture multiple events, the user manually resets
the bit to ‘1’ in software following any Power-on Reset.
© 2008 Microchip Technology Inc.
DD
DD
is adequate for operation.
is specified (parameter D004, Section269 “DC
Master Clear Reset (MCLR)
Power-on Reset (POR)
DD
rises above a certain threshold. This
DD
. This will
FIGURE 4-2:
Note 1: External Power-on Reset circuit is required
V
2: R < 40 kΩ is recommended to make sure that
3: R1 ≥ 1 kΩ will limit any current flowing into
DD
PIC18F2450/4450
D
only if the V
The diode D helps discharge the capacitor
quickly when V
the voltage drop across R does not violate
the device’s electrical specification.
MCLR from external capacitor C, in the event
of MCLR/V
static
Overstress (EOS).
V
DD
R
C
Discharge
PP
EXTERNAL POWER-ON
RESET CIRCUIT (FOR
SLOW V
DD
pin breakdown, due to Electro-
DD
R1
power-up slope is too slow.
powers down.
(ESD)
DD
PIC18FXXXX
MCLR
POWER-UP)
DS39760D-page 43
or
Electrical