AT89C51RC2-3CSIM Atmel, AT89C51RC2-3CSIM Datasheet - Page 33
AT89C51RC2-3CSIM
Manufacturer Part Number
AT89C51RC2-3CSIM
Description
IC 8051 MCU FLASH 32K 40DIP
Manufacturer
Atmel
Series
89Cr
Datasheet
1.AT89C51RB2-RLTIL.pdf
(127 pages)
Specifications of AT89C51RC2-3CSIM
Core Processor
8051
Core Size
8-Bit
Speed
60MHz
Connectivity
SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
32
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
40-DIP (0.600", 15.24mm)
For Use With
AT89STK-11 - KIT STARTER FOR AT89C51RX2
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-
- Current page: 33 of 127
- Download datasheet (2Mb)
Registers
4180E–8051–10/06
Table 22. CMOD Register
CMOD – PCA Counter Mode Register (D9h)
Reset Value = 00XX X000b
Not bit addressable
The CMOD register includes three additional bits associated with the PCA.
•
•
•
The CCON register contains the run control bit for the PCA and the flags for the PCA
timer (CF) and each Module (see Table 23).
•
•
•
Number
CIDL
The CIDL bit which allows the PCA to stop during idle mode.
The WDTE bit which enables or disables the watchdog function on Module 4.
The ECF bit which when set causes an interrupt and the PCA overflow flag CF (in
the CCON SFR) to be set when the PCA timer overflows.
Bit CR (CCON. 6) must be set by software to run the PCA. The PCA is shut off by
clearing this bit.
Bit CF: The CF bit (CCON. 7) is set when the PCA counter overflows and an
interrupt will be generated if the ECF bit in the CMOD register is set. The CF bit can
only be cleared by software.
Bits 0 through 4 are the flags for the Modules (bit 0 for Module 0, bit 1 for Module 1,
etc. ) and are set by hardware when either a match or a capture occurs. These flags
also can only be cleared by software.
Bit
7
7
6
5
4
3
2
1
0
Mnemonic Description
WDTE
WDTE
CPS1
CPS0
CIDL
ECF
Bit
6
-
-
-
Counter Idle Control
Cleared to program the PCA Counter to continue functioning during idle Mode.
Set to program PCA to be gated off during idle.
Watchdog Timer Enable
Cleared to disable Watchdog Timer function on PCA Module 4.
Set to enable Watchdog Timer function on PCA Module 4.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
PCA Count Pulse Select
CPS1 CPS0 Selected PCA input
0
0
1
1
PCA Enable Counter Overflow Interrupt
Cleared to disable CF bit in CCON to inhibit an interrupt.
Set to enable CF bit in CCON to generate an interrupt.
5
-
0
1
0
1
Internal clock F
Internal clock F
Timer 0 Overflow
External clock at ECI/P1.2 pin (max rate = fCLK PERIPH/ 4)
4
-
CLK PERIPH
LK PERIPH
3
-
AT89C51RB2/RC2
/2
/6
CPS1
2
CPS0
1
ECF
0
33
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