AT80C51RD2-RLTIM Atmel, AT80C51RD2-RLTIM Datasheet - Page 35

IC MCU 8051 5V SPI 20MHZ 44-VQFP

AT80C51RD2-RLTIM

Manufacturer Part Number
AT80C51RD2-RLTIM
Description
IC MCU 8051 5V SPI 20MHZ 44-VQFP
Manufacturer
Atmel
Series
80Cr
Datasheet

Specifications of AT80C51RD2-RLTIM

Core Processor
8051
Core Size
8-Bit
Speed
40MHz
Connectivity
UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
32
Program Memory Type
ROMless
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT80C51RD2-RLTIM
Manufacturer:
Atmel
Quantity:
10 000
Figure 11-3. UART Timings in Modes 2 and 3
11.2
11.2.1
4113D–8051–01/09
Automatic Address Recognition
Given Address
The automatic address recognition feature is enabled when the multiprocessor communication
feature is enabled (SM2 bit in SCON register is set).
Implemented in hardware, automatic address recognition enhances the multiprocessor commu-
nication feature by allowing the serial port to examine the address of each incoming command
frame. Only when the serial port recognizes its own address, the receiver sets RI bit in SCON
register to generate an interrupt. This ensures that the CPU is not interrupted by command
frames addressed to other devices.
If desired, you may enable the automatic address recognition feature in mode 1. In this configu-
ration, the stop bit takes the place of the ninth data bit. Bit RI is set only when the received
command frame address matches the device’s address and is terminated by a valid stop bit.
To support automatic address recognition, a device is identified by a given address and a broad-
cast address.
Note:
Each device has an individual address that is specified in SADDR register; the SADEN register
is a mask byte that contains don’t care bits (defined by zeros) to form the device’s given
address. The don’t care bits provide the flexibility to address one or more slaves at a time. The
following example illustrates how a given address is formed.
To address a device by its individual address, the SADEN mask byte must be 1111 1111b.
For example:
The following is an example of how to use given addresses to address different slaves:
Slave A:SADDR1111 0001b
Slave B:SADDR1111 0011b
The multiprocessor communication and automatic address recognition features cannot be
enabled in mode 0 (i.e. setting SM2 bit in SCON register in mode 0 has no effect).
SADDR0101 0110b
SADEN1111 1100b
Given0101 01XXb
SADEN1111 1010b
Given1111 0X0Xb
SADEN1111 1001b
SMOD0 = 0
SMOD0 = 1
SMOD0 = 1
RXD
FE
RI
RI
.Start
Bit
D0
D1
D2
D3
Data Byte
D4
D5
D6
D7
Ninth
AT80C51RD2
D8
Bit
Stop
Bit
35

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