AT91M40800-33AI SL383 Atmel, AT91M40800-33AI SL383 Datasheet

IC ARM MCU 16BIT 100TQFP

AT91M40800-33AI SL383

Manufacturer Part Number
AT91M40800-33AI SL383
Description
IC ARM MCU 16BIT 100TQFP
Manufacturer
Atmel
Series
AT91SAMr

Specifications of AT91M40800-33AI SL383

Core Processor
ARM7
Core Size
16/32-Bit
Speed
33MHz
Connectivity
EBI/EMI, UART/USART
Peripherals
POR, WDT
Number Of I /o
32
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Other names
AT91M4080033AISL3
Features
1. Description
The AT91M40800 microcontroller is a member of the Atmel AT91 16/32-bit microcon-
troller family, which is based on the ARM7TDMI processor core. This processor has a
high-performance 32-bit RISC architecture with a high-density 16-bit instruction set
and very low power consumption. In addition, a large number of internally banked reg-
isters result in very fast exception handling, making the device ideal for real-time
control applications.
The AT91M40800 microcontroller features a direct connection to off-chip memory,
including Flash, through the fully-programmable External Bus Interface (EBI). An
eight-level priority vectored interrupt controller, in conjunction with the Peripheral Data
Controller, significantly improves the real-time performance of the device.
The device is manufactured using Atmel’s high-density CMOS technology. By com-
bining the ARM7TDMI processor core with on-chip high-speed memory and a wide
range of peripheral functions on a monolithic chip, the AT91M40800 is a powerful
microcontroller that offers a flexible, cost-effective solution to many compute-intensive
embedded control applications.
Incorporates the ARM7TDMI
8K Bytes On-chip SRAM
Fully-programmable External Bus Interface (EBI)
8-level Priority, Individually Maskable, Vectored Interrupt Controller
32 Programmable I/O Lines
3-channel 16-bit Timer/Counter
2 USARTs
Programmable Watchdog Timer
Advanced Power-saving Features
Fully Static Operation:
1.8V to 3.6V Operating Range
-40 C to +85 C Temperature Range
Available in a 100-lead LQFP Package (Green)
– High-performance 32-bit RISC Architecture
– High-density 16-bit Instruction Set
– Leader in MIPS/Watt
– EmbeddedICE
– 32-bit Data Bus
– Single-clock Cycle Access
– Maximum External Address Space of 64M Bytes
– Up to 8 Chip Selects
– Software Programmable 8/16-bit External Databus
– 4 External Interrupts, Including a High-priority Low-latency Interrupt Request
– 3 External Clock Inputs
– 2 Multi-purpose I/O Pins per Channel
– 2 Dedicated Peripheral Data Controller (PDC) Channels per USART
– CPU and Peripheral Can Be Deactivated Individually
– 0 Hz to 40 MHz Internal Frequency Range at 3.0V, 85 C
®
ARM
®
Thumb
®
Processor Core
AT91 ARM
Thumb
Microcontrollers
AT91M40800
Summary
NOTE: This is a summary document.
The complete document is available on
the Atmel website at www.atmel.com.
1348FS–ATARM–13-Apr-06

Related parts for AT91M40800-33AI SL383

AT91M40800-33AI SL383 Summary of contents

Page 1

... The device is manufactured using Atmel’s high-density CMOS technology. By com- bining the ARM7TDMI processor core with on-chip high-speed memory and a wide range of peripheral functions on a monolithic chip, the AT91M40800 is a powerful microcontroller that offers a flexible, cost-effective solution to many compute-intensive embedded control applications. ...

Page 2

... Pin Configuration Figure 2-1. AT91M40800 Pinout (Top View) P22/RXD1 76 NWR1/NUB 77 GND 78 NRST 79 NWDOVF 80 VDD 81 MCKI 82 P23 83 P24/BMS 84 P25/MCKO 85 GND 86 GND 87 TMS 88 TDI 89 TDO 90 TCK 91 NRD/NOE 92 NWR0/NWE 93 VDD 94 VDD 95 NWAIT 96 NCS0 97 NCS1 98 P26/NCS2 99 P27/NCS3 100 AT91M40800 2 100-lead TQFP 50 P1/TIOA0 49 P0/TCLK0 48 D15 47 D14 ...

Page 3

... Pin Description Table 3-1. AT91M40800 Pin Description Module Name Function A0 - A23 Address Bus D0 - D15 Data Bus NCS0 - NCS3 Chip Select CS4 - CS7 Chip Select NWR0 Lower Byte 0 Write Signal NWR1 Upper Byte 1 Write Signal EBI NRD Read Signal NWE Write Enable ...

Page 4

... P25/MCKO P12/FIQ P9/IRQ0 P10/IRQ1 P11/IRQ2 P P13/SCK0 I P14/TXD0 O P15/RXD0 P20/SCK1 P21/TXD1/NTRI P22/RXD1 P16 P17 P18 P19 P23 P24/BMS AT91M40800 4 Embedded ICE ARM7TDMI Core ASB Clock 8K-byte RAM ASB Controller AMBA Bridge AIC: Advanced Interrupt Controller 2 PDC USART0 Channels APB 2 PDC USART1 Channels ...

Page 5

... Memories The AT91M40800 microcontroller embeds bytes of internal SRAM. The internal mem- ory is directly connected to the 32-bit data bus and is single-cycle accessible. The AT91M40800 microcontroller features an External Bus Interface (EBI), which enables con- nection of external memories and application-specific peripherals ...

Page 6

... The TC has also three external clock signals. 6. Associated Documentation The AT91M40800 is part of the AT91x40 Series microcontrollers, a member of the Atmel AT91 16/32-bit microcontroller family which is based on the ARM7TDMI processor core. reference. Table 6-1. ...

Page 7

... Product Overview 7.1 Power Supply The AT91M40800 microcontroller has a unique type of power supply pin – VDD. The VDD pin supplies the I/O pads and the device core. The supported voltage range on V 7.2 Input/Output Considerations The AT91M40800 microcontroller I/O pads are 5V-tolerant, enabling them to interface with external 5V devices without any additional components. Thus, the devices accept 5V (3V) on the inputs even if powered at 3V (2V). For further information, refer to the “ ...

Page 8

... In any of these address spaces, the ARM7TDMI operates in Little-Endian mode only. 7.6.1 Internal Memories The AT91M40800 microcontroller integrates 8K bytes of internal SRAM. All internal memories are 32 bits wide and single-clock cycle accessible. Byte (8-bit), half-word (16-bit) or word (32-bit) accesses are supported and are executed within one cycle. Fetching Thumb or ARM instruc- tions is supported and internal memory can store twice as many Thumb instructions as ARM ones ...

Page 9

... The ARM vectors (Reset, Abort, Data Abort, Prefetch Abort, Undefined Instruction, Interrupt, Fast Interrupt) are mapped from address 0x0 to address 0x20. In order to allow these vectors to be redefined dynamically by the software, the AT91M40800 microcontroller uses a remap com- mand that enables switching between the boot memory and the internal primary SRAM bank addresses ...

Page 10

... Peripheral Data Controller The AT91M40800 microcontroller has a 4-channel PDC dedicated to the two on-chip USARTs. One PDC channel is dedicated to the receiver and one to the transmitter of each USART. The user interface of a PDC channel is integrated in the memory space of each USART. It con- tains a 32-bit Address Pointer Register (RPR or TPR) and a 16-bit Transfer Counter Register (RCR or TCR) ...

Page 11

... PIO: Parallel I/O Controller The AT91M40800 microcontroller has 32 programmable I/O lines. Six pins are dedicated as general-purpose I/O pins. Other I/O lines are multiplexed with an external signal of a peripheral to optimize the use of available package pins. The PIO controller enables generation of an inter- rupt on input change and insertion of a simple input glitch filter on any of the PIO pins ...

Page 12

... TC: Timer Counter The AT91M40800 microcontroller features a Timer Counter block that includes three identical 16-bit timer counter channels. Each channel can be independently programmed to perform a wide range of functions including frequency measurement, event counting, interval measure- ment, pulse generation, delay timing and pulse width modulation. ...

Page 13

... Packaging Information Figure 9-1. 100-lead LQFP Package Drawing aaa PIN 1 ddd Table 9-1. Common Dimensions (mm) Symbol 1348FS–ATARM–13-Apr-06 ccc Min Nom 0.09 0.09 0.45 1.00 REF 0.08 0.08 AT91M40800 bbb 0.25 L1 Max 0.2 0.16 0.6 0.75 0.2 13 ...

Page 14

... Table 9-2. Lead Count Dimensions (mm) Pin D/E D1/E1 Count BSC BSC 100 16.0 14.0 Table 9-3. Device and 100-lead LQFP Package Maximum Weight 707 AT91M40800 14 0.2 0° 0° 11° 11° 0.05 1.35 Tolerances of form and position b Min Nom Max Min ...

Page 15

... A maximum of three reflow passes is allowed per component. 1348FS–ATARM–13-Apr-06 gives the recommended soldering profile from J-STD-020C. Soldering Profile Green Compliant Package The package is certified to be backward compatible with Pb/Sn soldering profile. AT91M40800 Green Package 3 C/sec. max. 180 sec. max. 60 sec. to 150 sec. ...

Page 16

... Ordering Information Table 11-1. Ordering Information Ordering Code AT91M40800-33AU AT91M40800 16 Package Package Type LQFP100 Green Operation Range Industrial (- 1348FS–ATARM–13-Apr-06 ...

Page 17

... Green and RoHs-compliant packages. Removed information on QFP leaded package in 1348FS and in Section 11. ”Ordering Information” on page 1348FS–ATARM–13-Apr-06 Table 6-1 on page 6. and “Soldering Profile” on page 15 Section 10. ”Soldering Profile” on page 15 16. AT91M40800 Change Request Ref. 04-185 05-331 2598 17 ...

Page 18

... Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN ATMEL’S TERMS AND CONDI- TIONS OF SALE LOCATED ON ATMEL’S WEB SITE, ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS, IMPLIED OR STATUTORY WARRANTY RELATING TO ITS PRODUCTS INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT ...

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