DSPIC30F5016-20I/PT Microchip Technology, DSPIC30F5016-20I/PT Datasheet - Page 51
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DSPIC30F5016-20I/PT
Manufacturer Part Number
DSPIC30F5016-20I/PT
Description
IC DSPIC MCU/DSP 66K 80TQFP
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr
Datasheets
1.DSPIC30F2011-20ISO.pdf
(66 pages)
2.DSPIC30F5011T-20IPT.pdf
(34 pages)
3.DSPIC30F6010T-20IPF.pdf
(6 pages)
4.DSPIC30F5016-20IPT.pdf
(100 pages)
Specifications of DSPIC30F5016-20I/PT
Core Processor
dsPIC
Core Size
16-Bit
Speed
20 MIPS
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
68
Program Memory Size
66KB (22K x 24)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TFQFP
For Use With
AC164320 - MODULE SKT MPLAB PM3 80TQFPAC30F007 - MODULE SKT FOR DSPIC30F 80TQFP
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
Other names
DSPIC30F501620IPT
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DSPIC30F5016-20I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
SPI™ Compatible Serial EEPROM Family – Page Write mode, HOLD pin, software enabled block write protection and hardware write-protect pin. Supports SPI™ modes 0, 3. (continued)
25LC160A
25AA160A
25LC160B
25AA160B
25C320
25LC320
25AA320
25LC640
25AA640
25LC256
25AA256
Identification Products (Application-Specific Products for Monitors, DRAM Modules, ACR Risers and Other Plug-And-Play Applications)
24LC21
24LCS21
24LC21A
24LCS21A
24LCS22A
24LC024
24LC025
24AA52
24LCS52
Product
Product
NOTE: 1
NOTE: 1
(3)
(3)
2: X/ST package code denotes rotated pinout.
3: All 25XX256 are Pb-free, “G” suffix not used.
All 25-series products are available in Pb-free packages. Order with “G” suffix. Example: 25LC080AT-I/MSG.
Pb-free packages also available. Order with “G” suffix. Example: 24LCS52T-I/STG.
Cycles
Cycles
100K
E/W
E/W
1M
1M
1M
1M
1M
1M
1M
1M
1M
1M
1M
1M
1M
1M
1M
1M
1M
1M
1M
(Organization)
(Organization)
256 Kbits (x8)
256 Kbits (x8)
16 Kbits (x8)
16 Kbits (x8)
16 Kbits (x8)
16 Kbits (x8)
32 Kbits (x8)
32 Kbits (x8)
32 Kbits (x8)
64 Kbits (x8)
64 Kbits (x8)
1 Kbits (x8)
1 Kbits (x8)
1 Kbits (x8)
1 Kbits (x8)
2 Kbits (x8)
2 Kbits (x8)
2 Kbits (x8)
2 Kbits (x8)
2 Kbits (x8)
Density
Density
Write Speed
Page Size
10 ms
10 ms
10 ms
10 ms
10 ms
10 ms
10 ms
10 ms
10 ms
16B
32B
32B
32B
32B
64B
64B
16B
32B
32B
32B
Write Speed
Max. Clock
Frequency
400 kHz
400 kHz
400 kHz
400 kHz
400 kHz
400 kHz
400 kHz
400 kHz
400 kHz
5 ms
5 ms
5 ms
5 ms
5 ms
5 ms
5 ms
5 ms
5 ms
5 ms
5 ms
Operating Voltage (V)
Max. Clock
Frequency
10 MHz
10 MHz
10 MHz
10 MHz
10 MHz
10 MHz
3 MHz
2 MHz
1 MHz
3 MHz
1 MHz
2.5 to 5.5
2.5 to 5.5
2.5 to 5.5
2.5 to 5.5
2.5 to 5.5
2.5 to 5.5
2.5 to 5.5
1.8 to 5.5
2.5 to 5.5
Operating Voltage
2.5 to 5.5
1.8 to 5.5
2.5 to 5.5
1.8 to 5.5
4.5 to 5.5
2.5 to 5.5
1.8 to 5.5
2.5 to 5.5
1.8 to 5.5
2.5 to 5.5
1.8 to 5.5
(V)
Temps
C, I
C, I
C, I
C, I
C, I
C, I
I
I
I
Temps
I, E
I, E
I, E
I, E
I, E
I. E
I
I
I
I
I
Completely implements DDC1™/DDC2™ interface for VESA
monitor identification. Improved noise filter. Write protection
pin. Not recommended for new designs. Use 24LC21A or
24LCS21A.
Same as 24LC21 plus software enabled write-protect pin. Not
recommended for new designs. Use 24LC21A or 24LCS21A.
Same as 24LC21 plus “return to DDC1” feature.
Same as 24LC21A plus software enabled write-protect pin.
Implements VESA E-EDID 1.3 for flat panels and projectors.
Includes “return to DDC1” feature and software - enabled write
protect pin.
Addressable, hardware write protection for DRAM DIMM
modules and other applications.
Addressable. No write-protect.
Addressable, hardware write protection and software write
protection for lower half of the array. Designed for DRAM
DIMM modules.
Family Products
Memory
Unique Features
Unique Features
P, SN, ST, MS, MC
P, SN, ST, MS, MC
P, SN, ST, MS, MC
P, SN, ST, MS, MC
P, SN
P, SN, X/ST
P, SN, X/ST
P, SN, X/ST
P, SN, X/ST
P, SN, ST, MF
P, SN, ST, MF
P, SN
P, SN
P, SN
P, SN
P, SN
P, SN, ST, MS
P, SN, ST, MS
P, SN, ST, MS
P, SN, ST, MS
Packages
Packages
(Note 1, 2)
(Note 1)
PAGE 49