ATMEGA169-16AU Atmel, ATMEGA169-16AU Datasheet - Page 90

• Manufacturer Part Number: ATMEGA169-16AU
• Description: IC AVR MCU 16K 16MHZ 5V 64TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA169-16AU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: SPI, UART/USART, USI
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 54
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP, 64-VQFP
• For Use With: ATAVRBFLY - KIT EVALUATION AVR BUTTERFLYATSTK502 - MOD EXPANSION AVR STARTER 500
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

90
ATmega169/V
Table 49. Waveform Generation Mode Bit Description
Note:
• Bit 5:4 – COM0A1:0: Compare Match Output Mode
These bits control the Output Compare pin (OC0A) behavior. If one or both of the
COM0A1:0 bits are set, the OC0A output overrides the normal port functionality of the
I/O pin it is connected to. However, note that the Data Direction Register (DDR) bit cor-
responding to the OC0A pin must be set in order to enable the output driver.
When OC0A is connected to the pin, the function of the COM0A1:0 bits depends on the
WGM01:0 bit setting. Table 50 shows the COM0A1:0 bit functionality when the
WGM01:0 bits are set to a normal or CTC mode (non-PWM).
Table 50. Compare Output Mode, non-PWM Mode
Table 51 shows the COM0A1:0 bit functionality when the WGM01:0 bits are set to fast
PWM mode.
Table 51. Compare Output Mode, Fast PWM Mode
Note:
Mode
COM0A1
COM0A1
0
1
2
3
0
0
1
1
0
0
1
1
1. The CTC0 and PWM0 bit definition names are now obsolete. Use the WGM01:0 def-
1. A special case occurs when OCR0A equals TOP and COM0A1 is set. In this case,
WGM01
(CTC0)
initions. However, the functionality and location of these bits are compatible with
previous versions of the timer.
the compare match is ignored, but the set or clear is done at BOTTOM. See “Fast
PWM Mode” on page 85 for more details.
0
0
1
1
COM0A0
COM0A0
0
1
0
1
0
1
0
1
WGM00
(PWM0)
0
1
0
1
Description
Normal port operation, OC0A disconnected.
Toggle OC0A on compare match
Clear OC0A on compare match
Set OC0A on compare match
Description
Normal port operation, OC0A disconnected.
Reserved
Clear OC0A on compare match, set OC0A at BOTTOM
(non-inverting mode)
Set OC0A on compare match, clear OC0A at BOTTOM
(inverting mode)
Timer/Counter
Mode of Operation
Normal
PWM, Phase Correct
CTC
Fast PWM
0xFF
0xFF
OCR0A
0xFF
TOP
(1)
(1)
Update of
OCR0A at
Immediate
TOP
Immediate
BOTTOM
TOV0 Flag
Set on
MAX
BOTTOM
MAX
MAX
2514P–AVR–07/06