AT89C5130A-RDTIM Atmel, AT89C5130A-RDTIM Datasheet - Page 30
AT89C5130A-RDTIM
Manufacturer Part Number
AT89C5130A-RDTIM
Description
IC 8051 MCU FLASH 16K USB 64VQFP
Manufacturer
Atmel
Series
AT89C513xr
Datasheet
1.AT89C5130A-PUTUM.pdf
(188 pages)
Specifications of AT89C5130A-RDTIM
Core Processor
C52X2
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
LED, POR, PWM, WDT
Number Of I /o
34
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
1.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Data Converters
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8.1.2
30
AT89C5130A/31A-M
External Bus Cycles
Figure 8-2.
Table 8-1.
This section describes the bus cycles the AT89C5130A/31A-M executes to fetch code (see
Figure 8-3) in the external program/code memory.
External memory cycle takes 6 CPU clock periods. This is equivalent to 12 oscillator clock peri-
ods in standard mode or 6 oscillator clock periods in X2 mode. For further information on X2
mode (see the clock Section).
For simplicity, the accompanying figure depicts the bus cycle waveforms in idealized form and
do not provide precise timing information.
Figure 8-3.
CPU Clock
PSEN
Signal
Name
AD7:0
PSEN
A15:8
ALE
ALE
P0
P2
External Code Memory Interface Structure
External Data Memory Interface Signals
External Code Fetch Waveforms
D7:0
PCH
Type
I/O
O
O
O
AT89C5130A
AT89C5131
Description
Address Lines
Upper address lines for the external bus.
Address/Data Lines
Multiplexed lower address lines and data for the external memory.
Address Latch Enable
ALE signals indicates that valid address information are available on lines
AD7:0.
Program Store Enable Output
This signal is active low during external code fetch or external code read
(MOVC instruction).
PSEN
ALE
PCL
P2
P0
AD7:0
PCH
A15:8
Latch
D7:0
A7:0
A15:8
A7:0
D7:0
OE
PCL
EPROM
Flash
PCH
D7:0
4337K–USB–04/08
Alternate
Function
P2.7:0
P0.7:0
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