AT89C5131A-S3SIM Atmel, AT89C5131A-S3SIM Datasheet - Page 90

• Manufacturer Part Number: AT89C5131A-S3SIM
• Description: IC 8051 MCU FLASH 32K USB 52PLCC
• Manufacturer: Atmel
• Series: AT89C513xr

Specifications of AT89C5131A-S3SIM

• Core Processor: C52X2
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART, USB
• Peripherals: LED, POR, PWM, WDT
• Number Of I /o: 34
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 1.25K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 52-PLCC
• For Use With: AT89STK-10 - KIT EVAL APPL MASS STORAGEAT89STK-05 - KIT STARTER FOR AT89C5131
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Data Converters: -

90
AT89C5130A/31A-M
Table 17-2.
KBE - Keyboard Input Enable Register (9Dh)
Reset Value = 0000 0000b
Number
KBE7
Bit
7
7
6
5
4
3
2
1
0
Mnemonic
KBE Register
KBE6
KBE7
KBE6
KBE5
KBE4
KBE3
KBE2
KBE1
KBE0
Bit
6
Description
Keyboard line 7 Enable bit
Cleared to enable standard I/O pin.
Set to enable KBF.7 bit in KBF register to generate an interrupt request.
Keyboard line 6 Enable bit
Cleared to enable standard I/O pin.
Set to enable KBF.6 bit in KBF register to generate an interrupt request.
Keyboard line 5 Enable bit
Cleared to enable standard I/O pin.
Set to enable KBF.5 bit in KBF register to generate an interrupt request.
Keyboard line 4 Enable bit
Cleared to enable standard I/O pin.
Set to enable KBF.4 bit in KBF register to generate an interrupt request.
Keyboard line 3 Enable bit
Cleared to enable standard I/O pin.
Set to enable KBF.3 bit in KBF register to generate an interrupt request.
Keyboard line 2 Enable bit
Cleared to enable standard I/O pin.
Set to enable KBF.2 bit in KBF register to generate an interrupt request.
Keyboard line 1 Enable bit
Cleared to enable standard I/O pin.
Set to enable KBF.1 bit in KBF register to generate an interrupt request.
Keyboard line 0 Enable bit
Cleared to enable standard I/O pin.
Set to enable KBF.0 bit in KBF register to generate an interrupt request.
KBE5
5
KBE4
4
KBE3
3
KBE2
2
KBE1
1
4337K–USB–04/08
KBE0
0