DSPIC30F3010T-20I/ML Microchip Technology, DSPIC30F3010T-20I/ML Datasheet - Page 9

IC DSPIC MCU/DSP 24K 44QFN

DSPIC30F3010T-20I/ML

Manufacturer Part Number
DSPIC30F3010T-20I/ML
Description
IC DSPIC MCU/DSP 24K 44QFN
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr

Specifications of DSPIC30F3010T-20I/ML

Core Processor
dsPIC
Core Size
16-Bit
Speed
20 MIPS
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
20
Program Memory Size
24KB (8K x 24)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFN
For Use With
XLT44QFN4 - SOCKET TRANS ICE 28DIP TO 44QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
13. Page 5-10, Section 5.4.2.1 Flash Program
 2004 Microchip Technology Inc.
On page 5-10, Section 5.4.2.1 Flash Program
Memory Programming Algorithm should be
replaced with the following:
Memory Programming Algorithm
5.4.2.1
Flash Program Memory Programming Algorithm
The user can erase and program Flash Program Memory by rows (32 instruction words). The
general process is as follows:
1.
2. Update the RAM data image with the new program memory data.
3. Erase program Flash row.
4. Write 32 instruction words of data from RAM into the Flash program memory write latches.
5. Program 32 instruction words into program Flash.
6.
Note:
• Setup NVMCON to program one row of Flash program memory.
• Disable interrupts.
• Write the key sequence to NVMKEY to enable the program cycle.
• Set the WR bit. This will begin the program cycle.
• CPU will stall for duration of the program cycle.
• The WR bit is cleared by the hardware when program cycle ends.
• Re-enable interrupts.
• Setup NVMCON register to erase 1 row of Flash program memory.
• Write address of row to be erased into NVMADRU and NVMADR registers.
• Disable interrupts.
• Write the key sequence to NVMKEY to enable the erase.
• Set the WR bit. This will begin erase cycle.
• CPU will stall for the duration of the erase cycle.
• The WR bit is cleared when erase cycle ends.
• Re-enable interrupts.
Read one row of program Flash (32 instruction words) and store into data RAM as a data
“image”. The RAM image must be read from an even 32-word program memory address
boundary.
memory
Repeat steps 1 through 6, as needed, to program the desired amount of Flash program
The user should remember that the minimum amount of program memory that can
be modified using RTSP is 32 instruction word locations. Therefore, it is important
that an image of these locations be stored in general purpose RAM before an erase
cycle is initiated. An erase cycle must be performed on any previously written
locations before any programming is done.
dsPIC30F Family Reference Manual
DS80169E-page 9

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