DSPIC33FJ64GP310-I/PT Microchip Technology, DSPIC33FJ64GP310-I/PT Datasheet - Page 199
![IC DSPIC MCU/DSP 64K 100TQFP](/photos/12/13/121330/c04-100-tqfp_sml.jpg)
DSPIC33FJ64GP310-I/PT
Manufacturer Part Number
DSPIC33FJ64GP310-I/PT
Description
IC DSPIC MCU/DSP 64K 100TQFP
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheets
1.PIC24HJ12GP201-ISO.pdf
(84 pages)
2.DSPIC33FJ64GP206-IPT.pdf
(322 pages)
3.DSPIC33FJ64GP206-IPT.pdf
(28 pages)
Specifications of DSPIC33FJ64GP310-I/PT
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
AC'97, Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
85
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 32x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TFQFP
Core Frequency
40MHz
Core Supply Voltage
2.75V
Embedded Interface Type
DCI, I2C, SPI, UART
No. Of I/o's
85
Flash Memory Size
64KB
Supply Voltage Range
3V To 3.6V
Package
100TQFP
Device Core
dsPIC
Family Name
dSPIC33
Maximum Speed
40 MHz
Operating Supply Voltage
3.3 V
Data Bus Width
16 Bit
Number Of Programmable I/os
85
Interface Type
I2C/SPI/UART
On-chip Adc
32-chx10-bit|32-chx12-bit
Number Of Timers
9
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164333 - MODULE SKT FOR PM3 100QFPDM300024 - KIT DEMO DSPICDEM 1.1DV164033 - KIT START EXPLORER 16 MPLAB ICD2MA330012 - MODULE DSPIC33 100P TO 84QFPMA330011 - MODULE DSPIC33 100P TO 100QFPDM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DSPIC33FJ64GP310-I/PT
Manufacturer:
MICROCHIP
Quantity:
12 000
Company:
Part Number:
DSPIC33FJ64GP310-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC24HJ12GP201-ISO PDF datasheet
- DSPIC33FJ64GP206-IPT PDF datasheet #2
- DSPIC33FJ64GP206-IPT PDF datasheet #3
- Current page: 199 of 322
- Download datasheet (5Mb)
REGISTER 19-4:
© 2009 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-13
bit 12-5
bit 4-0
R/W-0
U-0
—
DMABS<2:0>
DMABS<2:0>: DMA Buffer Size bits
111 = Reserved
110 = 32 buffers in DMA RAM
101 = 24 buffers in DMA RAM
100 = 16 buffers in DMA RAM
011 = 12 buffers in DMA RAM
010 = 8 buffers in DMA RAM
001 = 6 buffers in DMA RAM
000 = 4 buffers in DMA RAM
Unimplemented: Read as ‘0’
FSA<4:0>: FIFO Area Starts with Buffer bits
11111 = RB31 buffer
11110 = RB30 buffer
•
•
•
00001 = TRB1 buffer
00000 = TRB0 buffer
R/W-0
U-0
—
CiFCTRL: ECAN™ FIFO CONTROL REGISTER
W = Writable bit
‘1’ = Bit is set
R/W-0
U-0
—
dsPIC33FJXXXGPX06/X08/X10
R/W-0
U-0
—
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
R/W-0
U-0
—
FSA<4:0>
R/W-0
U-0
—
x = Bit is unknown
R/W-0
U-0
—
DS70286C-page 197
R/W-0
U-0
—
bit 8
bit 0
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