DSPIC33FJ64MC510-I/PT Microchip Technology, DSPIC33FJ64MC510-I/PT Datasheet - Page 183
![IC DSPIC MCU/DSP 64K 100TQFP](/photos/12/13/121330/c04-100-tqfp_sml.jpg)
DSPIC33FJ64MC510-I/PT
Manufacturer Part Number
DSPIC33FJ64MC510-I/PT
Description
IC DSPIC MCU/DSP 64K 100TQFP
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheets
1.MA330013.pdf
(370 pages)
2.PIC24HJ12GP201-ISO.pdf
(84 pages)
3.DSPIC33FJ64MC506-IPT.pdf
(340 pages)
4.DSPIC33FJ64MC506-IPT.pdf
(30 pages)
Specifications of DSPIC33FJ64MC510-I/PT
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
CAN, I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
85
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 24x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TFQFP
Core Frequency
40MHz
Core Supply Voltage
2.75V
Embedded Interface Type
CAN, I2C, SPI, UART
No. Of I/o's
85
Flash Memory Size
64KB
Supply Voltage Range
3V To 3.6V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164333 - MODULE SKT FOR PM3 100QFPMA330013 - MODULE PLUG-IN DSPIC33 100TQFPDV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DSPIC33FJ64MC510-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
DSPIC33FJ64MC510-I/PT
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
- MA330013 PDF datasheet
- PIC24HJ12GP201-ISO PDF datasheet #2
- DSPIC33FJ64MC506-IPT PDF datasheet #3
- DSPIC33FJ64MC506-IPT PDF datasheet #4
- Current page: 183 of 340
- Download datasheet (5Mb)
REGISTER 16-4:
© 2009 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14-0
SEVTDIR
Note 1: SEVTDIR is compared with PTDIR (PTMR<15>) to generate the Special Event Trigger.
R/W-0
R/W-0
2: SEVTCMP<14:0> is compared with PTMR<14:0> to generate the Special Event Trigger.
(1)
SEVTDIR: Special Event Trigger Time Base Direction bit
1 = A Special Event Trigger will occur when the PWM time base is counting downwards
0 = A Special Event Trigger will occur when the PWM time base is counting upwards
SEVTCMP<14:0>: Special Event Compare Value bits
R/W-0
R/W-0
PxSECMP: SPECIAL EVENT COMPARE REGISTER
W = Writable bit
‘1’ = Bit is set
R/W-0
R/W-0
dsPIC33FJXXXMCX06/X08/X10
R/W-0
R/W-0
SEVTCMP<7:0>
SEVTCMP<14:8>
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
R/W-0
R/W-0
(2)
(2)
(1)
(2)
R/W-0
R/W-0
x = Bit is unknown
R/W-0
R/W-0
DS70287C-page 181
R/W-0
R/W-0
bit 8
bit 0
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