DSPIC33FJ64MC510-I/PT Microchip Technology, DSPIC33FJ64MC510-I/PT Datasheet - Page 227
![IC DSPIC MCU/DSP 64K 100TQFP](/photos/12/13/121330/c04-100-tqfp_sml.jpg)
DSPIC33FJ64MC510-I/PT
Manufacturer Part Number
DSPIC33FJ64MC510-I/PT
Description
IC DSPIC MCU/DSP 64K 100TQFP
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheets
1.MA330013.pdf
(370 pages)
2.PIC24HJ12GP201-ISO.pdf
(84 pages)
3.DSPIC33FJ64MC506-IPT.pdf
(340 pages)
4.DSPIC33FJ64MC506-IPT.pdf
(30 pages)
Specifications of DSPIC33FJ64MC510-I/PT
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
CAN, I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
85
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 24x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TFQFP
Core Frequency
40MHz
Core Supply Voltage
2.75V
Embedded Interface Type
CAN, I2C, SPI, UART
No. Of I/o's
85
Flash Memory Size
64KB
Supply Voltage Range
3V To 3.6V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164333 - MODULE SKT FOR PM3 100QFPMA330013 - MODULE PLUG-IN DSPIC33 100TQFPDV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DSPIC33FJ64MC510-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
DSPIC33FJ64MC510-I/PT
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
- MA330013 PDF datasheet
- PIC24HJ12GP201-ISO PDF datasheet #2
- DSPIC33FJ64MC506-IPT PDF datasheet #3
- DSPIC33FJ64MC506-IPT PDF datasheet #4
- Current page: 227 of 370
- Download datasheet (6Mb)
19.2
1.
2.
3.
4.
5.
6.
19.3
1.
2.
3.
4.
5.
6.
19.4
The following sequence will send a message frame
header made up of a Break, followed by an auto-baud
Sync byte.
1.
2.
3.
4.
5.
© 2007 Microchip Technology Inc.
Set up the UART:
a)
b)
c)
Enable the UART.
Set the UTXEN bit (causes a transmit interrupt).
Write data byte to lower byte of UxTXREG word.
The value will be immediately transferred to the
Transmit Shift Register (TSR) and the serial bit
stream will start shifting out with the next rising
edge of the baud clock.
Alternately, the data byte may be transferred
while UTXEN = 0, and then the user may set
UTXEN. This will cause the serial bit stream to
begin immediately because the baud clock will
start from a cleared state.
A transmit interrupt will be generated as per
interrupt control bits, UTXISEL<1:0>.
Set up the UART (as described in Section 19.2
“Transmitting in 8-bit Data Mode”).
Enable the UART.
Set the UTXEN bit (causes a transmit interrupt).
Write UxTXREG as a 16-bit value only.
A word write to UxTXREG triggers the transfer
of the 9-bit data to the TSR. Serial bit stream will
start shifting out with the first rising edge of the
baud clock.
A transmit interrupt will be generated as per the
setting of control bits, UTXISEL<1:0>.
Configure the UART for the desired mode.
Set UTXEN and UTXBRK – sets up the Break
character.
Load the UxTXREG register with a dummy
character to initiate transmission (value is
ignored).
Write 0x55 to UxTXREG – loads Sync character
into the transmit FIFO.
After the Break has been sent, the UTXBRK bit
is reset by hardware. The Sync character now
transmits.
Transmitting in 8-bit Data Mode
Write appropriate values for data, parity and
Stop bits.
Write appropriate baud rate value to the
BRGx register.
Set up transmit and receive interrupt enable
and priority bits.
Transmitting in 9-bit Data Mode
Break and Sync Transmit
Sequence
Preliminary
19.5
1.
2.
3.
4.
5.
The act of reading the UxRXREG character will move
the next character to the top of the receive FIFO,
including a new set of PERR and FERR values.
19.6
UARTx Clear to Send (UxCTS) and Request to Send
(UxRTS) are the two hardware controlled active-low
pins that are associated with the UART module. These
two pins allow the UART to operate in Simplex and
Flow Control modes. They are implemented to control
the transmission and the reception between the Data
Terminal Equipment (DTE). The UEN<1:0> bits in the
UxMODE register configures these pins.
19.7
The UART module provides two types of infrared UART
support:
• IrDA clock output to support external IrDA
• Full implementation of the IrDA encoder and
19.7.1
To support external IrDA encoder and decoder devices,
the BCLK pin (same as the UxRTS pin) can be
configured to generate the 16x baud clock. With
UEN<1:0> = 11, the BCLK pin will output the 16x baud
clock if the UART module is enabled; it can be used to
support the IrDA codec chip.
19.7.2
The UART has full implementation of the IrDA encoder
and decoder as part of the UART module. The built-in
IrDA encoder and decoder functionality is enabled
using the IREN bit (UxMODE<12>). When enabled
(IREN = 1), the receive pin (UxRX) acts as the input
from the infrared receiver. The transmit pin (UxTX) acts
as the output to the infrared transmitter.
encoder and decoder device (legacy module
support)
decoder.
Set up the UART (as described in Section 19.2
“Transmitting in 8-bit Data Mode”).
Enable the UART.
A receive interrupt will be generated when one
or more data characters have been received as
per interrupt control bits, URXISEL<1:0>.
Read the OERR bit to determine if an overrun
error has occurred. The OERR bit must be reset
in software.
Read UxRXREG.
Receiving in 8-bit or 9-bit Data
Mode
Flow Control Using UxCTS and
UxRTS Pins
Infrared Support
EXTERNAL IrDA SUPPORT – IrDA
CLOCK OUTPUT
BUILT-IN IrDA ENCODER AND
DECODER
dsPIC33F
DS70165E-page 225
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