ATTINY2313V-10PI Atmel, ATTINY2313V-10PI Datasheet - Page 27
![IC AVR MCU FLASH 2K 1.8V 20DIP](/photos/6/80/68043/313-20-dip_sml.jpg)
ATTINY2313V-10PI
Manufacturer Part Number
ATTINY2313V-10PI
Description
IC AVR MCU FLASH 2K 1.8V 20DIP
Manufacturer
Atmel
Series
AVR® ATtinyr
Specifications of ATTINY2313V-10PI
Core Processor
AVR
Core Size
8-Bit
Speed
10MHz
Connectivity
SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
18
Program Memory Size
2KB (1K x 16)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Data Converters
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATTINY2313V-10PI
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
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External Clock
2543L–AVR–08/10
To drive the device from an external clock source, XTAL1 should be driven as shown in
13. To run the device on an external clock, the CKSEL Fuses must be programmed to “0000”.
Figure 13. External Clock Drive Configuration
When this clock source is selected, start-up times are determined by the SUT Fuses as shown in
Table
Table 9. Crystal Oscillator Clock Frequency
Table 10. Start-up Times for the External Clock Selection
When applying an external clock, it is required to avoid sudden changes in the applied clock fre-
quency to ensure stable operation of the MCU. A variation in frequency of more than 2% from
one clock cycle to the next can lead to unpredictable behavior. It is required to ensure that the
MCU is kept in Reset during such changes in the clock frequency.
Note that the System Clock Prescaler can be used to implement run-time changes of the internal
clock frequency while still ensuring stable operation.
CKSEL3..0
0000 - 0001
SUT1..0
00
01
10
11
10.
Start-up Time from Power-
down and Power-save
6 CK
6 CK
6 CK
EXTERNAL
SIGNAL
CLOCK
NC
Frequency Range
0 - 16 MHz
Additional Delay from
Reset (V
Reserved
14CK + 4.1 ms
14CK + 65 ms
14CK
CC
= 5.0V)
XTAL2
XTAL1
GND
BOD enabled
Fast rising power
Recommended Usage
Slowly rising power
Figure
27
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