ATTINY167-15MD Atmel, ATTINY167-15MD Datasheet - Page 103
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ATTINY167-15MD
Manufacturer Part Number
ATTINY167-15MD
Description
MCU AVR 16K FLASH 15MHZ 32-QFN
Manufacturer
Atmel
Series
AVR® ATtinyr
Datasheet
1.ATTINY167-15MD.pdf
(283 pages)
Specifications of ATTINY167-15MD
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, LIN, SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
16
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 150°C
Package / Case
32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
Processor Series
ATTINY1x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
512 B
Maximum Clock Frequency
16 MHz
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
For Use With
ATSTK600-SOIC - STK600 SOCKET/ADAPTER FOR SOIC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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10.11.2
10.11.3
10.11.4
7728G–AVR–06/10
Timer/Counter0 Register – TCNT0
Output Compare Register A – OCR0A
Asynchronous Status Register – ASSR
The three Clock Select bits select the clock source to be used by the Timer/Counter, see
Table
Table 10-5.
The Timer/Counter Register gives direct access, both for read and write operations, to the
Timer/Counter unit 8-bit counter. Writing to the TCNT0 Register blocks (removes) the Com-
pare Match on the following timer clock. Modifying the counter (TCNT0) while the counter is
running, introduces a risk of missing a Compare Match between TCNT0 and the OCR0x
Register.
The Output Compare Register A contains an 8-bit value that is continuously compared with
the counter value (TCNT0). A match can be used to generate an Output Compare interrupt, or
to generate a waveform output on the OC0A pin.
• Bit 7 – Res: Reserved Bit
This bit is reserved in the ATtiny87/167 and will always read as zero.
• Bit 6 – EXCLK: Enable External Clock Input
When EXCLK is written to one, and asynchronous clock is selected, the external clock input
buffer is enabled and an external clock can be input on XTAL1 pin instead of an external crys-
tal. Writing to EXCLK should be done before asynchronous operation is selected. Note that
the crystal oscillator will only run when this bit is zero.
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
CS02
10-5.
0
0
0
0
1
1
1
1
OCR0A7
Clock Select Bit Description
TCNT07
R
7
–
0
R/W
R/W
7
0
7
0
CS01
0
0
1
1
0
0
1
1
EXCLK
OCR0A6 OCR0A5
R/W
TCNT06
6
0
R/W
R/W
6
0
6
0
CS00
TCNT05
AS0
R/W
0
5
R/W
R/W
0
1
0
1
0
1
0
1
5
0
5
0
TCN0UB
OCR0A4
TCNT04
R
4
0
R/W
R/W
Description
No clock source (Timer/Counter stopped).
clk
clk
clk
clk
clk
clk
clk
4
0
4
0
T
T
T
T
T
T
T
0
0
0
0
0
0
0
S
S
S
S
S
S
S
/256 (From prescaler)
/1024 (From prescaler)
/8 (From prescaler)
/32 (From prescaler)
/64 (From prescaler)
/128 (From prescaler)
OCR0AUB
OCR0A3
(No prescaling)
TCNT03
R/W
R/W
R
3
0
3
0
3
0
ATtiny87/ATtiny167
OCR0A2
TCNT02
R/W
R/W
2
0
2
0
R
2
–
0
OCR0A1
TCR0AUB
TCNT01
R/W
R/W
1
0
1
0
R
1
0
OCR0A0
TCNT00
TCR0BUB
R/W
R/W
0
0
0
0
R
0
0
OCR0A
TCNT0
ASSR
103
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