ATTINY87-15XZ Atmel, ATTINY87-15XZ Datasheet - Page 101
![MCU AVR 8K FLASH 15MZ 20-TSSOP](/photos/6/80/68045/313-20-tssop_sml.jpg)
ATTINY87-15XZ
Manufacturer Part Number
ATTINY87-15XZ
Description
MCU AVR 8K FLASH 15MZ 20-TSSOP
Manufacturer
Atmel
Series
AVR® ATtinyr
Datasheet
1.ATTINY167-15MD.pdf
(283 pages)
Specifications of ATTINY87-15XZ
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, LIN, SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
16
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
20-TSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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7728G–AVR–06/10
When OC0A is connected to the pin, the function of the COM0A1:0 bits depends on the
WGM01:0 bit setting.
bits are set to a normal or CTC mode (non-PWM).
Table 10-1.
Table 10-2
mode.
Table 10-2.
Note:
Table 10-3
rect PWM mode.
Table 10-3.
Note:
• Bit 5:2 – Res: Reserved Bits
These bits are reserved in the ATtiny87/167 and will always read as zero.
COM0A1
COM0A1
COM0A1
0
0
1
1
0
0
1
1
0
0
1
1
1. A special case occurs when OCR0A equals TOP and COM0A1 is set. In this case, the Com-
1. A special case occurs when OCR0A equals TOP and COM0A1 is set. In this case, the Com-
shows the COM0A1:0 bit functionality when the WGM01:0 bits are set to fast PWM
pare Match is ignored, but the set or clear is done at TOP. See
94
shows the COM01:0 bit functionality when the WGM01:0 bits are set to phase cor-
pare Match is ignored, but the set or clear is done at TOP. See
on page 95
for more details.
Compare Output Mode, non-PWM Mode
Compare Output Mode, Fast PWM Mode
Compare Output Mode, Phase Correct PWM Mode
COM0A0
COM0A0
COM0A0
0
1
0
1
0
1
0
1
0
1
0
1
for more details.
Table 10-1
Description
Normal port operation, OC0A disconnected.
Clear OC0A on Compare Match.
Set OC0A at BOTTOM (non-inverting mode).
Set OC0A on Compare Match.
Clear OC0A at BOTTOM (inverting mode).
Description
Normal port operation, OC0A disconnected.
Clear OC0A on Compare Match when up-counting.
Set OC0A on Compare Match when down-counting.
Set OC0A on Compare Match when up-counting.
Clear OC0A on Compare Match when down-counting.
Description
Normal port operation, OC0A disconnected.
Toggle OC0A on Compare Match.
Clear OC0A on Compare Match.
Set OC0A on Compare Match.
shows the COM0A1:0 bit functionality when the WGM01:0
(1)
ATtiny87/ATtiny167
(1)
“Phase Correct PWM Mode”
“Fast PWM Mode” on page
101
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