EP7312-IV-90 Cirrus Logic Inc, EP7312-IV-90 Datasheet - Page 50

• Manufacturer Part Number: EP7312-IV-90
• Description: IC ARM720T MCU 90MHZ 208-LQFP
• Manufacturer: Cirrus Logic Inc
• Series: EP7r

Specifications of EP7312-IV-90

• Core Processor: ARM7
• Core Size: 32-Bit
• Speed: 90MHz
• Connectivity: Codec, DAI, EBI/EMI, IrDA, Keypad, SPI/Microwire1, UART/USART
• Peripherals: LCD, LED, MaverickKey, PWM
• Number Of I /o: 27
• Program Memory Type: ROMless
• Ram Size: 56K x 8
• Voltage - Supply (vcc/vdd): 2.3 V ~ 2.7 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 208-LQFP
• For Use With: 598-1209 - KIT DEVELOPMENT EP73XX ARM7
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Other names: 598-1246

EP7312
High-Performance, Low-Power System on Chip
50
Ball Location
C14
C15
C16
D10
D11
D12
D13
D14
D15
D16
E10
E11
E12
E13
E14
E15
E16
F10
F11
F12
D1
D2
D3
D4
D5
D6
D7
D8
D9
E1
E2
E3
E4
E5
E6
E7
E8
E9
F1
F2
F3
F4
F5
F6
F7
F8
F9
nMEDCHG/nBROM
WRITE/nSDRAS
nMWE/nSDWE
RUN/CLKEN
nEXTPWR
nSDCS[0]
VSSOSC
EXPRDY
VSSRTC
nPWRFL
MOSCIN
SDQM[2]
VSSRTC
SDCKE
VDDIO
VDDIO
RXD[2]
WORD
VDDIO
BATOK
VSSIO
VSSIO
nCS[2]
VSSIO
VSSIO
nCS[0]
VSSIO
VSSIO
TXD[2]
VSSIO
Name
nPOR
DD[3]
CL[2]
PB[7]
D[10]
PB[5]
PB[3]
FRM
D[4]
D[7]
D[8]
A[0]
D[5]
D[9]
A[1]
D[6]
TDI
Strength
with p/u*
Schmitt
1
1
1
1
1
1
1
1
1
1
1
1
2
1
2
1
1
1
1
1
1
1
2
1
2
1
†
Table 22. 256-Ball PBGA Ball Listing (Continued)
Input
Input
Input
Reset
State
High
High
High
High
High
©
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Copyright Cirrus Logic, Inc. 2005
‡
‡
‡
(All Rights Reserved)
Oscillator ground
Core ground
RTC ground
Pad ground
Pad ground
Pad ground
Pad ground
Pad ground
Pad ground
Pad ground
Pad power
Pad power
Pad power
Type
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
I
I
I/O ground
Power-on reset input
External power supply sense input
Transfer direction / SDRAM RAS signal output
Expansion port ready input
I/O ground
Digital I/O power, 3.3V
Chip select 2
ROM, expansion write enable/ SDRAM write enable control signal
SDRAM chip select 2
LCD pixel clock out
Real time clock ground
Data I/O
Power fail sense input
Main oscillator input
Digital I/O power, 3.3V
I/O ground
Data I/O
Data I/O
UART 2 receive data input
GPIO port B
JTAG data input
Word access select output
I/O ground
Chip select 0
SDRAM byte lane mask
LCD frame synchronization pulse
System byte address
Data I/O
PLL ground
I/O ground
Media change interrupt input / internal ROM boot enable
Digital I/O power, 3.3V
Data I/O
Data I/O
GPIO port B
GPIO port B
I/O ground
UART 2 transmit data output
Run output / clock enable output
I/O ground
SDRAM clock enable output
LCD serial display data
System byte address
Data I/O
Real time clock ground
Battery OK input
Description
DS508F1