CY8C26233-24SI Cypress Semiconductor Corp, CY8C26233-24SI Datasheet - Page 93

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CY8C26233-24SI

Manufacturer Part Number
CY8C26233-24SI
Description
IC MCU 8K FLASH 256B 20-SOIC
Manufacturer
Cypress Semiconductor Corp
Series
PSOC™ CY8C26xxxr
Datasheet

Specifications of CY8C26233-24SI

Core Processor
M8C
Core Size
8-Bit
Speed
24MHz
Connectivity
SPI, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
16
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.25 V
Data Converters
A/D 1x8b, 1x11b, 1x12b; D/A 1x9b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
428-1427
428-1427-5
428-1427

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10.10.2
10.10.2.1
FCap controls the size of the switched feedback capaci-
tor in the integrator.
ClockPhase controls the internal clock phasing relative
to the input clock phasing. ClockPhase affects the output
of the analog column bus which is controlled by the
AnalogBus bit in Control 2 Register (ASB11CR2,
ASB13CR2, ASB20CR2, ASB22CR2).
Table 72:
September 5, 2002
BMuxSCB
Bit #
POR
Read/
Write
Bit Name
ARefMux
A Inputs
B Inputs
A Mux
REFLO
REFHI
AGND
ASign
Registers
Analog Switch Cap Type B Block xx Control 0 Register
Analog Switch Cap Type B Block xx Control 0 Register
FCap
RW
7
0
φ
2
ClockPhase
+!BSW
φ
φ
1
2
Figure 25: Analog Switch Cap Type B PSoC Blocks
RW
6
0
0..31 C
0..31 C
ACap
BCap
φ
Document #: 38-12010 CY Rev. ** CMS Rev. 3.20
1
*BSW
ASign
RW
5
0
φ
2
+AutoZero
φ
!AutoZero
φ
1
2
+!BSW
*
φ
ACap[4]
1
*BSW
RW
4
0
ASign controls the switch phasing of the switches on the
bottom plate of the A capacitor. The bottom plate sam-
ples the input or the reference.
The ACap bits set the value of the capacitor in the A
path.
16,32 C
FCap
Power
ACap[3]
RW
3
0
φ
1
*AutoZero
φ
1
* FSW0
2
ACap[2]
+!AutoZero)
RW
2
0
* FSW1
ACap[1]
RW
1
0
AnalogBus*φ
0..31 C
Analog PSoC Blocks
CCap
CompBus
ACap[0]
RW
2
0
0
B
BQTAP
OUT
ABUS
CBUS
93

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