CY8C26643-24PI Cypress Semiconductor Corp, CY8C26643-24PI Datasheet - Page 30

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CY8C26643-24PI

Manufacturer Part Number
CY8C26643-24PI
Description
IC MCU 16K FLASH 256B 48-DIP
Manufacturer
Cypress Semiconductor Corp
Series
PSOC™ CY8C26xxxr
Datasheet

Specifications of CY8C26643-24PI

Core Processor
M8C
Core Size
8-Bit
Speed
24MHz
Connectivity
SPI, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
44
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.25 V
Data Converters
A/D 1x8b, 1x11b, 1x12b; D/A 1x9b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-DIP (0.600", 15.24mm)
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Applications
CapSense
Technology
CMOS
Processing Unit
Microcontroller
Operating Supply Voltage (min)
3V
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.25V
Package Type
PDIP
Screening Level
Industrial
Pin Count
48
Mounting
Through Hole
Rad Hardened
No
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Not Compliant, Contains lead / RoHS non-compliant
Other names
428-1432
428-1432-5
428-1432

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY8C26643-24PI
Manufacturer:
CY
Quantity:
9
Part Number:
CY8C26643-24PI
Quantity:
11
30
GPIO Read
Global Select
Bonding
Pad
CPU Bus
GPIO Write
Global Out
Global Select
GPIO
InterruptEnable
(INT_MSK0:5)
D
Q
D Q
En
Cypress MicroSystems CY8C25122/CY8C26233/CY8C26443/CY8C26643 Family Data Sheet
Document #: 38-12010 CY Rev. ** CMS Rev. 3.20
IM0
IM1
IM0
IM1
IM0
IM1
DM0
DM1
DM0
DM1
DM1
DM0
DM0
DM1
Figure 7: General Purpose I/O Pins
Rise
Fall
Change
V
DD
V
SS
V
DD
V
5.6K
5.6K
SS
From
Other
GPIO
Pins
Interrupt Mode
Drive Mode
DM1
IM1
0
0
1
1
0
0
1
1
DM0
IM0
0
1
0
1
0
1
0
1
Output
Output
Suppress Interrupt
Falling Edge
Rising Edge
Change from last read
Resistive Pulldown
Strong Drive
High Z (off)
Resistive Pullup
Analog Out (Port 0 Only)
Analog In (Ports 0 and 2 Only)
1
September 5, 2002
D
Q
Global Input Line
To CPU Bus
GPIO Int

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