Z8F6422AR020SC Zilog, Z8F6422AR020SC Datasheet - Page 130

IC ENCORE MCU FLASH 64K 64LQFP

Z8F6422AR020SC

Manufacturer Part Number
Z8F6422AR020SC
Description
IC ENCORE MCU FLASH 64K 64LQFP
Manufacturer
Zilog
Series
Encore!® XP®r
Datasheets

Specifications of Z8F6422AR020SC

Core Processor
Z8
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
46
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
64-LQFP
Processor Series
Z8F642x
Core
eZ8
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
46
Number Of Timers
16 Bit
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Development Tools By Supplier
Z8F64200100KITG, ZENETSC0100ZACG, ZUSBSC00100ZACG, Z8F64210100ZDA, Z8F64210100ZDP, Z8F64210100ZDV, Z8F64220100ZDA, Z8F64220100ZDV, Z8F6422AR00ZEM, Z8F6422VS00ZEM, Z8F6421AN00ZEM
Minimum Operating Temperature
0 C
On-chip Adc
10 bit, 12 Channel
For Use With
269-4678 - KIT DEV FOR Z8F642 MCU 44 PIN269-4677 - KIT DEV FOR Z8F642 MCU 28PIN269-4540 - KIT DEV FOR Z8 ENCORE 16K TO 64K
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No RoHS Version Available
Other names
269-3302

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Table 58. UART Address Compare Register (UxADDR)
PS019921-0308
BITS
FIELD
RESET
R/W
ADDR
UART Address Compare Register
UART Baud Rate High and Low Byte Registers
7
1 = Infrared Encoder/Decoder is enabled. The UART transmits and receives data
The UART Address Compare register
the UART. When the MPMD[1] bit of UART Control Register 0 is set, all incoming
address bytes are compared to the value stored in the Address Compare register. Receive
interrupts and RDA assertions only occur in the event of a match.
COMP_ADDR—Compare Address
This 8-bit value is compared to the incoming address bytes.
The UART Baud Rate High and Low Byte registers (see
page 117) combine to create a 16-bit baud rate divisor value (BRG[15:0]) that sets the data
transmission rate (baud rate) of the UART. To configure the Baud Rate Generator as a
timer with interrupt on time-out, complete the following procedure:
1. Disable the UART by clearing the REN and TEN bits in the UART Control 0 register
2. Load the desired 16-bit count value into the UART Baud Rate High and Low Byte
3. Enable the Baud Rate Generator timer function and associated interrupt by setting the
When configured as a general purpose timer, the UART BRG interrupt interval is calcu-
lated using the following equation:
to 0.
registers.
BRGCTL bit in the UART Control 1 register to 1.
through the Infrared Encoder/Decoder.
UART BRG Interrupt Interval s ( )
6
5
=
F45H and F4DH
System Clock Period (s) BRG 15:0
COMP_ADDR
4
(Table
R/W
0
58) stores the multi-node network address of
3
Z8 Encore! XP
×
Table 59
2
[
Product Specification
]
and
Table 60
1
®
F64XX Series
on
0
UART
116

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