ZGP323LAP4008G Zilog, ZGP323LAP4008G Datasheet - Page 5

IC Z8 GP MCU 8K OTP 40DIP

ZGP323LAP4008G

Manufacturer Part Number
ZGP323LAP4008G
Description
IC Z8 GP MCU 8K OTP 40DIP
Manufacturer
Zilog
Series
Z8® GP™r
Datasheets

Specifications of ZGP323LAP4008G

Core Processor
Z8
Core Size
8-Bit
Speed
8MHz
Peripherals
HLVD, POR, WDT
Number Of I /o
32
Program Memory Size
8KB (8K x 8)
Program Memory Type
OTP
Ram Size
237 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
40-DIP (0.620", 15.75mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Connectivity
-
Other names
269-4425
ZGP323LAP4008G
Architectural Overview
PS023709-0208
Note:
Zilog’s ZGP323L is an OTP-based member of the MCU family of infrared
microcontrollers. With 237 B of general-purpose RAM and up to 32 KB of OTP, Zilog’s
CMOS microcontrollers offer fast-executing, efficient use of memory, sophisticated
interrupts, input/output bit manipulation capabilities, automated pulse generation/
reception, and internal key-scan pull-up transistors.
The ZGP323L architecture (see
with an Expanded Register File allowing access to register-mapped peripherals, I/O
circuits, and powerful counter/timer circuitry. The Z8
efficient register and address space structure, and a number of ancillary features that are
useful in many consumer, automotive, computer peripheral, and battery-operated hand-
held applications.
There are three basic address spaces available to support a wide range of configurations:
Program Memory, Register File and Expanded Register File. The register file is composed
of 256 bytes of RAM. It includes 4 I/O port registers, 16 control and status registers, and
236 general-purpose registers. The Expanded Register File consists of two additional
register groups (F and D).
To unburden the program from coping with such real-time problems as generating
complex waveforms or receiving and demodulating complex waveform/pulses, the Z8 GP
OTP MCU offers a new intelligent counter/timer architecture with 8-bit and
16-bit counter/timers (see
modes and two on-board comparators to process analog signals with separate reference
voltages.
All signals with an overline, “ ”, are active Low. For example, B/W, in which WORD is
active Low, and B/W, in which BYTE is active Low.
Power connections use the conventional descriptions listed in
Table 1. Power Connections
Connection
Power
Ground
Circuit
V
GND
CC
Figure
Figure
2). Also included are a large number of user-selectable
1) is based on Zilog’s 8-bit microcontroller core
Device
V
V
DD
SS
®
offers a flexible I/O scheme, an
Table
Product Specification
1.
Architectural Overview
1

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