Z8F042AHJ020SG Zilog, Z8F042AHJ020SG Datasheet - Page 74

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Z8F042AHJ020SG

Manufacturer Part Number
Z8F042AHJ020SG
Description
IC ENCORE XP MCU FLASH 4K 28SSOP
Manufacturer
Zilog
Series
Encore!® XP®r
Datasheet

Specifications of Z8F042AHJ020SG

Core Processor
Z8
Core Size
8-Bit
Speed
20MHz
Connectivity
IrDA, UART/USART
Peripherals
Brown-out Detect/Reset, LED, LVD, POR, PWM, Temp Sensor, WDT
Number Of I /o
23
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
28-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
269-4159
Z8F042AHJ020SG

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
Z8F042AHJ020SG2156
Manufacturer:
ZILOG
Quantity:
121
Table 25. Interrupt Request 0 Register (IRQ0)
Interrupt Control Register Definitions
PS022517-0508
BITS
FIELD
RESET
R/W
ADDR
Interrupt Request 0 Register
7
Reserved
For all interrupts other than the WDT interrupt, the Interrupt Control Registers enable
individual interrupts, set interrupt priorities, and indicate interrupt requests.
The Interrupt Request 0 (IRQ0) Register
vectored and polled interrupts. When a request is presented to the interrupt controller, the
corresponding bit in the IRQ0 Register becomes 1. If interrupts are globally enabled
(vectored interrupts), the interrupt controller passes an interrupt request to the eZ8 CPU.
If interrupts are globally disabled (polled interrupts), the eZ8 CPU reads the IRQ0
Register to determine if any interrupt requests are pending.
Reserved—Must be 0
T1I—Timer 1 Interrupt Request
0 = No interrupt request is pending for Timer 1.
1 = An interrupt request from Timer 1 is awaiting service.
T0I—Timer 0 Interrupt Request
0 = No interrupt request is pending for Timer 0.
1 = An interrupt request from Timer 0 is awaiting service.
Note:
6
T1I
Poor coding style that resulting in lost interrupt requests:
To avoid missing interrupts, the following style of coding to set bits in the
Good coding style that avoids lost interrupt requests:
Interrupt Request Registers is recommended
LDX r0, IRQ0
OR r0, MASK
LDX IRQ0, r0
ORX IRQ0, MASK
5
T0I
4
U0RXI
FC0H
R/W
(Table
0
3
U0TXI
25) stores the interrupt requests for both
2
Z8 Encore! XP
I2CI
Product Specification
1
SPII
®
Interrupt Controller
F0822 Series
0
ADCI
61

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