COP8SCR9KMT8 National Semiconductor, COP8SCR9KMT8 Datasheet - Page 62
![IC MCU EEPROM 8BIT 32K 56-TSSOP](/photos/6/86/68628/14-56-tssop_sml.jpg)
COP8SCR9KMT8
Manufacturer Part Number
COP8SCR9KMT8
Description
IC MCU EEPROM 8BIT 32K 56-TSSOP
Manufacturer
National Semiconductor
Series
COP8™ 8Sr
Datasheet
1.COP8SCR9HVA8NOPB.pdf
(80 pages)
Specifications of COP8SCR9KMT8
Core Processor
COP8
Core Size
8-Bit
Speed
20MHz
Connectivity
Microwire/Plus (SPI), UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
49
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
56-TSSOP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-
Other names
*COP8SCR9KMT8
www.national.com
18.0 Memory Map
All RAM, ports and registers (except A and PC) are mapped
into data memory address space.
0000 to 006F
0070 to 007F
xx80 to xx90
xx90
xx91
xx92
xx93
xx94
xx95
xx96
xx97
xx98 to xx9F
xxA0
xxA1
xxA2
xxA3
xxA4
xxA5
xxA6
xxA7
xxA8
xxA9
xxAA
xxAB
xxAC
xxAD
xxAE
xxAF
xxB0
xxB1
xxB2
xxB3
xxB4
xxB5
xxB6
xxB7
xxB8
xxB9
S/ADD REG
Address
On-Chip RAM bytes (112 bytes)
Unused RAM Address Space (Reads
As All Ones)
Unused RAM Address Space (Reads
Undefined Data)
Port E Data Register
Port E Configuration Register
Port E Input Pins (Read Only)
Reserved for Port E
Port F Data Register
Port F Configuration Register
Port F Input Pins (Read Only)
Reserved for Port F
Reserved
Port A Data Register
Port A Configuration Register
Port A Input Pins (Read Only)
Reserved for Port A
Port B Data Register
Port B Configuration Register
Port B Input Pins (Read Only)
Reserved for Port B
ISP Address Register Low Byte
(ISPADLO)
ISP Address Register High Byte
(ISPADHI)
ISP Read Data Register (ISPRD)
ISP Write Data Register (ISPWR)
Reserved
Reserved
Reserved
High Speed Timers Control Register
(HSTCR)
Timer T3 Lower Byte
Timer T3 Upper Byte
Timer T3 Autoload Register T3RA
Lower Byte
Timer T3 Autoload Register T3RA
Upper Byte
Timer T3 Autoload Register T3RB
Lower Byte
Timer T3 Autoload Register T3RB
Upper Byte
Timer T3 Control Register
Reserved
USART Transmit Buffer (TBUF)
USART Receive Buffer (RBUF)
Contents
62
xxBA
xxBB
xxBC
xxBD
xxBE
xxBF
xxC0
xxC1
xxC2
xxC3
xxC4
xxC5
xxC6
xxC7
xxC8
xxC9
xxCA
xxCB to xxCE
xxCF
xxD0
xxD1
xxD2
xxD3
xxD4
xxD5
xxD6
xxD7
xxD8
xxD9
xxDA
xxDB
xxDC
xxDD to xxDF
xxE0
xxE1
xxE2
xxE3 to xxE5
xxE6
S/ADD REG
Address
USART Control and Status Register
(ENU)
USART Receive Control and Status
Register (ENUR)
USART Interrupt and Clock Source
Register (ENUI)
USART Baud Register (BAUD)
USART Prescale Select Register
(PSR)
Reserved for USART
Timer T2 Lower Byte
Timer T2 Upper Byte
Timer T2 Autoload Register T2RA
Lower Byte
Timer T2 Autoload Register T2RA
Upper Byte
Timer T2 Autoload Register T2RB
Lower Byte
Timer T2 Autoload Register T2RB
Upper Byte
Timer T2 Control Register
WATCHDOG Service Register
(Reg:WDSVR)
MIWU Edge Select Register
(Reg:WKEDG)
MIWU Enable Register (Reg:WKEN)
MIWU Pending Register
(Reg:WKPND)
Reserved
Idle Timer Control Register (ITMR)
Port L Data Register
Port L Configuration Register
Port L Input Pins (Read Only)
Reserved for Port L
Port G Data Register
Port G Configuration Register
Port G Input Pins (Read Only)
Reserved
Port C Data Register
Port C Configuration Register
Port C Input Pins (Read Only)
Reserved for Port C
Port D
Reserved for Port D
Reserved
Flash Memory Write Timing Register
(PGMTIM)
ISP Key Register (ISPKEY)
Reserved
Timer T1 Autoload Register T1RB
Lower Byte
Contents