C8051F061 Silicon Laboratories Inc, C8051F061 Datasheet - Page 69
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C8051F061
Manufacturer Part Number
C8051F061
Description
IC 8051 MCU 64K FLASH 64TQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F06xr
Specifications of C8051F061
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
CAN, SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
24
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 2x16b, 8x10b; D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
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5.5.
The ADC0 Programmable Window Detector continuously compares the ADC0 output to user-programmed
limits, and notifies the system when an out-of-bound condition is detected. This is especially effective in an
interrupt-driven system, saving code space and CPU bandwidth while delivering faster system response
times. The window detector interrupt flag (AD0WINT in ADC0CN) can also be used in polled mode. The
high and low bytes of the reference words are loaded into the ADC0 Greater-Than and ADC0 Less-Than
registers (ADC0GTH, ADC0GTL, ADC0LTH, and ADC0LTL). The Window Detector can be used in single-
ended or differential mode. In signle-ended mode, the Window Detector compares the ADC0GTx and
ADC0LTx registers to the output of ADC0. In differential mode, the combined output of ADC0 and ADC1
(contained in the ADC0 data registers) is used for the comparison. Reference comparisons are shown
starting on page 71. Notice that the window detector flag can be asserted when the measured data is
inside or outside the user-programmed limits, depending on the programming of the ADC0GTx and
ADC0LTx registers.
Bits 7-0: High byte of ADC0 Greater-Than Data Word.
Bits 7-0: Low byte of ADC0 Greater-Than Data Word.
R/W
R/W
Bit7
Bit7
ADC0 Programmable Window Detector
Figure 5.24. ADC0GTH: ADC0 Greater-Than Data High Byte Register
Figure 5.25. ADC0GTL: ADC0 Greater-Than Data Low Byte Register
R/W
R/W
Bit6
Bit6
R/W
R/W
Bit5
Bit5
R/W
R/W
Bit4
Bit4
Rev. 1.2
R/W
R/W
Bit3
Bit3
C8051F060/1/2/3/4/5/6/7
R/W
R/W
Bit2
Bit2
R/W
R/W
Bit1
Bit1
SFR Address:
SFR Address:
SFR Page:
SFR Page:
R/W
R/W
Bit0
Bit0
0xC5
0
0xC4
0
Reset Value
Reset Value
11111111
11111111
69
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