MAXQ3210-EJX+ Maxim Integrated Products, MAXQ3210-EJX+ Datasheet - Page 9

• Manufacturer Part Number: MAXQ3210-EJX+
• Description: IC MCU 16BIT LP 24-TSSOP
• Manufacturer: Maxim Integrated Products
• Series: MAXQ™r

Specifications of MAXQ3210-EJX+

• Core Processor: RISC
• Core Size: 16-Bit
• Speed: 3.6MHz
• Peripherals: LED, Power-Fail Reset, POR, PWM, WDT
• Number Of I /o: 15
• Program Memory Size: 2KB (1K x 16)
• Program Memory Type: EEPROM
• Eeprom Size: 128 x 8
• Ram Size: 64 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 24-TSSOP
• Processor Series: MAXQ3210
• Core: RISC
• Data Bus Width: 16 bit
• Data Ram Size: 64 B
• Interface Type: JTAG
• Maximum Clock Frequency: 3.58 mhZ
• Number Of Programmable I/os: 15
• Number Of Timers: 1
• Operating Supply Voltage: 6 V to 9.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: MAXQ3210-KIT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Data Converters: -
• Connectivity: -
• Lead Free Status / Rohs Status: Details

and the upper three bits containing the register
subindex within that module. Any time that it is neces-
sary to directly select one of the upper 24 index loca-
tions in a destination module, the prefix register PFX is
needed to supply the extra destination bits. This prefix
register write is inserted automatically by the assembler
and requires only one additional execution cycle.
The device incorporates several memory areas:
• 2kWords of utility ROM
• 1kWords of EEPROM for program storage
• 128bytes of EEPROM for data storage
• 64bytes of SRAM for storage of temporary variables
• 4-level stack memory for storage of program return
Figure 1. Memory Map
Microcontroller with Internal Voltage Regulator,
addresses and general-purpose use
Piezoelectric Horn Driver, and Comparator
Memory Organization
PROGRAM MEMORY
UTILITY ROM
PROGRAM
EEPROM
SPACE
64 x 16
2k x 16
1k x 16
32 x 16
SRAM
_____________________________________________________________________
A020h
A000h
03FFh
A05Fh
A01Fh
87FFh
8000h
0000h
(BYTE MODE)
128 x 8 EEPROM
DATA SPACE
UTILITY ROM
64 x 8 SRAM
The memory is arranged by default in a Harvard archi-
tecture, with separate address spaces for program and
data memory. A special pseudo-Von Neumann memory
mode allows data memory to be mapped into program
space, permitting code execution from data memory.
This places the utility ROM, code, and data memory
into a single contiguous memory map. This is useful for
applications that require dynamic program modification
or unique memory configurations. In addition, another
mode allows program memory to be mapped into data
space, permitting code constants to be accessed as
data memory.
The incorporation of EEPROM for program storage allows
the devices to be reprogrammed, eliminating the expense
of throwing away one-time programmable devices during
development and field upgrades. EEPROM can be pass-
word protected with a 16-word key, denying access to
program memory by unauthorized individuals.
4k x 8
003Fh
8000h
00BFh
0040h
0000h
8FFFh
(WORD MODE)
64 x 16 EEPROM
DATA SPACE
32 x 16 SRAM
UTILITY ROM
2k x 16
005Fh
001Fh
0000h
87FFh
0020h
8000h
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