MCP6034-E/SL Microchip Technology, MCP6034-E/SL Datasheet - Page 14

• Manufacturer Part Number: MCP6034-E/SL
• Description: IC OPAMP QUAD 1.8V 14SOIC
• Manufacturer: Microchip Technology

Specifications of MCP6034-E/SL

• Slew Rate: 0.004 V/µs
• Package / Case: 14-SOIC (3.9mm Width), 14-SOL
• Amplifier Type: General Purpose
• Number Of Circuits: 4
• Output Type: Rail-to-Rail
• Gain Bandwidth Product: 10kHz
• Current - Input Bias: 1pA
• Voltage - Input Offset: 150µV
• Current - Supply: 0.9µA
• Current - Output / Channel: 23mA
• Voltage - Supply, Single/dual (±): 1.8 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Number Of Channels: 4
• Common Mode Rejection Ratio (min): 70 dB
• Input Offset Voltage: 0.15 mV
• Input Bias Current (max): 100 pA
• Operating Supply Voltage: 3 V, 5 V
• Supply Current: 0.0054 mA
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Shutdown: No
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 1.8 V
• Technology: CMOS
• Voltage Gain Db: 115 dB
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• -3db Bandwidth: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

MCP6031/2/3/4
4.0
The MCP6031/2/3/4 family of op amps is manufactured
using Microchip’s state-of-the-art CMOS process and
is specifically designed for low-power, high precision
applications.
4.1
4.1.1
The MCP6031/2/3/4 op amps are designed to prevent
phase reversal when the input pins exceed the supply
voltages.
ing the supply voltage without any phase reversal.
4.1.2
The ESD protection on the inputs can be depicted as
shown in
protect the input transistors and to minimize input bias
current (I
when they try to go more than one diode drop below
V
V
normal operation and low enough to bypass ESD
events within the specified limits.
FIGURE 4-1:
Structures.
In order to prevent damage and/or improper operation
of these op amps, the circuit they are in must limit the
voltages and currents at the V
Absolute Maximum Ratings at the beginning of
Section 1.0 “Electrical Characteristics”).
shows the recommended approach to protecting these
inputs. The internal ESD diodes prevent the input pins
(V
the resistors R
out of the input pins. Diodes D
input pins (V
When implemented as shown, resistors R
limit the current through D
DS22041B-page 14
SS
DD
IN+
. They also clamp any voltage that go too far above
; their breakdown voltage is high enough to allow
V
V
V
and V
IN
DD
SS
+
APPLICATION INFORMATION
Rail-to-Rail Input
B
Figure 2-32
). The input ESD diodes clamp the inputs
Figure
Bond
Bond
Bond
PHASE REVERASAL
INPUT VOLTAGE AND CURRENT
LIMITS
Pad
Pad
Pad
IN-
IN+
1
) from going too far below ground, and
and V
and R
4-1. This structure was chosen to
IN-
shows the input voltage exceed-
2
Simplified Analog Input ESD
limit the possible current drawn
) from going too far above V
Stage
Input
1
and D
IN+
1
2
and D
.
and V
Bond
Pad
2
1
IN-
prevent the
and R
Figure 4-2
V
pins (see
IN
–
2
also
DD
.
FIGURE 4-2:
Inputs.
It is also possible to connect the diodes to the left of the
resistors R
the diodes D
mechanism. The resistors then serve as in-rush current
limiters; the DC currents into the input pins (V
V
current can flow out of the inputs when the common
mode voltage (V
4.1.3
The input stage of the MCP6031/2/3/4 op amps uses
two differential input stages in parallel. One operates at
a low common mode input voltage (V
other operates at a high V
device operates with a V
and 300 mV below V
measured at V
ensure proper operation.
There are two transitions in input behavior as V
changed. The first occurs, when V
V
V
non-inverting gains, avoid these regions of operation.
IN-
SS
DD
) should be very small. A significant amount of
+ 0.4V, and the second occurs when V
– 0.5V. For the best distortion performance with
V
V
1
2
R
R
1
1
2
NORMAL OPERATION
and R
1
>
>
and D
R
R
V
V
CM
D
1
2
SS
SS
CM
1
2
– (minimum expected V
– (minimum expected V
) is below ground (V
. In this case, the currents through
= V
2
need to be limited by some other
D
SS
Protecting the Analog
2
© 2008 Microchip Technology Inc.
SS
. The input offset voltage is
CM
– 0.3V and V
2 mA
2 mA
CM
up to 300 mV above V
. With this topology, the
MCP603X
V
R
DD
3
SS
CM
DD
CM
).
), while the
1
2
CM
)
)
+ 0.3V to
is near
IN+
is near
CM
and
DD
is