OP07CSZ Analog Devices Inc, OP07CSZ Datasheet

IC OPAMP GP LDRIFT LN 8SOIC

OP07CSZ

Manufacturer Part Number
OP07CSZ
Description
IC OPAMP GP LDRIFT LN 8SOIC
Manufacturer
Analog Devices Inc
Datasheets

Specifications of OP07CSZ

Slew Rate
0.3 V/µs
Amplifier Type
General Purpose
Number Of Circuits
1
Current - Input Bias
1.8nA
Voltage - Input Offset
60µV
Voltage - Supply, Single/dual (±)
±3 V ~ 18 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Op Amp Type
Low Offset Voltage
No. Of Amplifiers
1
Bandwidth
600kHz
Supply Voltage Range
± 3V To ± 18V
Amplifier Case Style
SOIC
No. Of Pins
8
Common Mode Rejection Ratio
120
Current, Input Bias
±1.8 nA
Current, Input Offset
0.8 nA
Impedance, Thermal
43 °C/W
Package Type
SOIC-8
Power Dissipation
80 mW
Resistance, Input
33 Megohms (Differential), 120 Gigaohms (Common-Mode)
Temperature, Operating, Range
-40 to +85 °C
Voltage, Gain
400 V/mV
Voltage, Input
±14 V
Voltage, Noise
20 nV/sqrt Hz
Voltage, Offset
60 μV
Voltage, Output, High
+13 V
Voltage, Output, Low
-13 V
Voltage, Supply
±15 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Supply
-
Output Type
-
Current - Output / Channel
-
-3db Bandwidth
-
Gain Bandwidth Product
-
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

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FEATURES
Low V
Low V
Ultrastable vs. time: 1.5 μV per month maximum
Low noise: 0.6 μV p-p maximum
Wide input voltage range: ±14 V typical
Wide supply voltage range: 3 V to 18 V
125°C temperature-tested dice
APPLICATIONS
Wireless base station control circuits
Optical network control circuits
Instrumentation
Sensors and controls
Precision filters
GENERAL DESCRIPTION
The OP07 has very low input offset voltage (75 μV maximum for
OP07E) that is obtained by trimming at the wafer stage. These
low offset voltages generally eliminate any need for external
nulling. The OP07 also features low input bias current (±4 nA for
the OP07E) and high open-loop gain (200 V/mV for the OP07E).
The low offset and high open-loop gain make the OP07
particularly useful for high gain instrumentation applications.
Rev. F
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
Thermocouples
Resistor thermal detectors (RTDs)
Strain bridges
Shunt current measurements
OS
OS
: 75 μV maximum
drift: 1.3 μV/°C maximum
NONINVERTING
1
R2A AND R2B ARE ELECTRONICALLY ADJUSTED ON CHIP AT FACTORY FOR MINIMUM INPUT OFFSET VOLTAGE.
INVERTING
INPUT
INPUT
V+
7
3
2
R3
R4
Q5
Q21
Q22
V–
Q7
Q23
Q24
4
R2A
R1A
1
Q3
Q1
1
Q6
(OPTIONAL
NULL)
Q8
Figure 2. Simplified Schematic
8
Q4
Q2
R2B
R1B
1
Q27
Q26
Q25
R5
C1
C3
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
The wide input voltage range of ±13 V minimum combined
with a high CMRR of 106 dB (OP07E) and high input
impedance provide high accuracy in the noninverting circuit
configuration. Excellent linearity and gain accuracy can be
maintained even at high closed-loop gains. Stability of offsets
and gain with time or variations in temperature is excellent. The
accuracy and stability of the OP07, even at high gain, combined
with the freedom from external nulling have made the OP07 an
industry standard for instrumentation applications.
The OP07 is available in two standard performance grades. The
OP07E is specified for operation over the 0°C to 70°C range,
and the OP07C is specified over the −40°C to +85°C
temperature range.
The OP07 is available in epoxy 8-lead PDIP and 8-lead narrow
SOIC packages. For CERDIP and TO-99 packages and standard
microcircuit drawing (SMD) versions, see the OP77.
Q9
Q11
Q13
C2
Q12
Q14
V
Ultralow Offset Voltage
OS
TRIM
Q10
Operational Amplifier
©2002-2010 Analog Devices, Inc. All rights reserved.
PIN CONFIGURATION
–IN
+IN
V–
1
2
3
4
NC = NO CONNECT
Q17
OP07
Figure 1.
Q15
Q16
R6
8
7
6
5
Q18
R7
R8
V
V+
OUT
NC
OS
TRIM
Q19
Q20
R9
R10
www.analog.com
OUT
6
OP07

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OP07CSZ Summary of contents

Page 1

FEATURES Low μV maximum OS Low V drift: 1.3 μV/°C maximum OS Ultrastable vs. time: 1.5 μV per month maximum Low noise: 0.6 μV p-p maximum Wide input voltage range: ±14 V typical Wide supply voltage range: ...

Page 2

OP07 TABLE OF CONTENTS Features .............................................................................................. 1 Applications ....................................................................................... 1 General Description ......................................................................... 1 Pin Configuration ............................................................................. 1 Revision History ............................................................................... 2 Specifications ..................................................................................... 3 OP07E Electrical Characteristics ............................................... 3 OP07C Electrical Characteristics ............................................... 4 REVISION HISTORY 8/10—Rev ...

Page 3

SPECIFICATIONS OP07E ELECTRICAL CHARACTERISTICS V = ±15 V, unless otherwise noted. S Table 1. Parameter INPUT CHARACTERISTICS T = 25°C A Input Offset Voltage 1 Long-Term V Stability 2 OS Input Offset Current Input Bias Current Input Noise Voltage Input ...

Page 4

OP07 Parameter DYNAMIC PERFORMANCE T = 25°C A Slew Rate Closed-Loop Bandwidth Open-Loop Output Resistance Power Consumption Offset Adjustment Range 1 Input offset voltage measurements are performed by automated test equipment approximately 0.5 seconds after application of power. 2 Long-term ...

Page 5

Parameter OUTPUT CHARACTERISTICS T = 25°C A Output Voltage Swing −40°C ≤ T ≤ +85°C A Output Voltage Swing DYNAMIC PERFORMANCE T = 25°C A Slew Rate Closed-Loop Bandwidth Open-Loop Output Resistance Power Consumption Offset Adjustment Range 1 Input offset ...

Page 6

OP07 ABSOLUTE MAXIMUM RATINGS Table 3. Parameter Supply Voltage ( Input Voltage 1 Differential Input Voltage Output Short-Circuit Duration Storage Temperature Range S and P Packages Operating Temperature Range OP07E OP07C Junction Temperature Lead Temperature, Soldering (60 sec) ...

Page 7

TYPICAL PERFORMANCE CHARACTERISTICS 1000 V = ±15V S 900 800 700 600 500 400 300 200 100 0 –75 –50 – TEMPERATURE (°C) Figure 3. Open-Loop Gain vs. Temperature ±15V 25°C, ...

Page 8

OP07 ±15V S 3 OP07C 2 OP07E 1 0 –75 –50 – TEMPERATURE (°C) Figure 9. Input Bias Current vs. Temperature 2 ±15V S 2.0 1.5 1.0 OP07C 0.5 OP07E 0 –100 ...

Page 9

OP07C 100 0 100 FREQUENCY (Hz) Figure 15. PSRR vs. Frequency 1000 800 600 400 200 0 0 ±5 ±10 ±15 POWER SUPPLY VOLTAGE (V) Figure 16. Open-Loop Gain vs. Power ...

Page 10

OP07 1000 100 TOTAL SUPPLY VOLTAGE V– (V) Figure 21. Power Consumption vs. Power Supply (PIN 3) = +10mV (PIN 3) = –10mV, V ...

Page 11

TYPICAL APPLICATIONS R1 SUM MODE E IN BIAS R3 V+ 3kΩ 2 – AD7115 OR – R5 10kΩ OP07C + 100kΩ 4 V– – Figure 26. ...

Page 12

OP07 SENDING JUNCTION 7 2 – OP07 REFERENCE JUNCTION V– NOTES 1. PINOUT SHOWN FOR P PACKAGE Figure 32. High Stability Thermocouple Amplifier R3 R4 10kΩ 10kΩ V+ FD333 ...

Page 13

OUTLINE DIMENSIONS 0.25 (0.0098) 0.10 (0.0040) COPLANARITY 0.210 (5.33) MAX 0.150 (3.81) 0.130 (3.30) 0.115 (2.92) 0.022 (0.56) 0.018 (0.46) 0.014 (0.36) CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR REFERENCE ONLY AND ARE ...

Page 14

... Temperature Range 1 OP07EPZ 0°C to 70°C OP07CPZ −40°C to +85°C OP07CSZ −40°C to +85°C OP07CSZ-REEL −40°C to +85°C OP07CSZ-REEL7 −40°C to +85° RoHS Compliant Part. 1 Package Description 8-Lead PDIP 8-Lead PDIP 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N Rev ...

Page 15

NOTES Rev Page OP07 ...

Page 16

OP07 NOTES ©2002-2010 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D00316-0-8/10(F) Rev Page ...

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