AD711JNZ Analog Devices Inc, AD711JNZ Datasheet - Page 9

• Manufacturer Part Number: AD711JNZ
• Description: IC OPAMP BIFET PREC 25MA 8DIP
• Manufacturer: Analog Devices Inc

Specifications of AD711JNZ

• Slew Rate: 20 V/µs
• Amplifier Type: J-FET
• Number Of Circuits: 1
• -3db Bandwidth: 4MHz
• Current - Input Bias: 15pA
• Voltage - Input Offset: 300µV
• Current - Supply: 2.5mA
• Current - Output / Channel: 25mA
• Voltage - Supply, Single/dual (±): 9 V ~ 36 V, ±4.5 V ~ 18 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Through Hole
• Package / Case: 8-DIP (0.300", 7.62mm)
• Op Amp Type: General Purpose
• No. Of Amplifiers: 1
• Bandwidth: 4MHz
• Supply Voltage Range: ± 4.5V To ± 18V
• Amplifier Case Style: DIP
• No. Of Pins: 8
• Common Mode Rejection Ratio: 88
• Current, Input Bias: 15 pA
• Current, Input Offset: 10 pA
• Current, Output: 25 mA
• Harmonic Distortion: 0.0003 %
• Impedance, Thermal: 33 °C/W
• Package Type: PDIP-8
• Power Dissipation: 500 mW
• Resistance, Input: 3×10^12 Ohms
• Temperature, Operating, Range: 0 to +70 °C
• Voltage, Input: ±20 V (Differential), -11.5 to +14.5 V (Common-Mode)
• Voltage, Noise: 45 nV/sqrt Hz
• Voltage, Offset: 0.3 mV
• Voltage, Output, High: +13.9 V
• Voltage, Output, Low: -13.3 V
• Voltage, Supply: ±15 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Output Type: -
• Gain Bandwidth Product: -
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

REV. E
GUARDING
The low input bias current (15 pA) and low noise characteristics
of the AD711 BiFET op amp make it suitable for electrometer
applications such as photo diode preamplifiers and picoampere
Figure 5a. Settling Characteristics 0 to +10 V Step
Upper Trace: Output of AD711 Under Test (5 V/Div)
Lower Trace: Amplified Error Voltage (0.01%/Div)
Figure 5b. Settling Characteristics 0 to –10 V Step
Upper Trace: Output of AD711 Under Test (5 V/Div)
Lower Trace: Amplified Error Voltage (0.01%/Div)
(OR
EQUIVALENT
FLAT TOP
PULSE
GENERATOR)
DYNAMICS
DATA
5109
V
IN
10k
4.99k
0.1 F
–15V
200k
Figure 6. Settling Time Test Circuit
AD711
10k
+15V
5-18pF
4.99k
0.1 F
HP2835
5k
1.1k
0.47 F
–9–
10pF
–15V
AD3554
current-to-voltage converters. The use of a guarding technique
such as that shown in Figure 7, in printed circuit board layout
and construction is critical to minimize leakage currents. The
guard ring is connected to a low impedance potential at the
same level as the inputs. High impedance signal lines should
not be extended for any unnecessary length on the printed
circuit board.
D/A CONVERTER APPLICATIONS
The AD711 is an excellent output amplifier for CMOS DACs.
It can be used to perform both 2-quadrant and 4-quadrant
operation. The output impedance of a DAC using an inverted
R-2R ladder approaches R for codes containing many 1s, 3R
for codes containing a single 1, and for codes containing all
zero, the output impedance is infinite.
For example, the output resistance of the AD7545 will modu-
late between 11 kW and 33 kW. Therefore, with the DAC’s
internal feedback resistance of 11 kW, the noise gain will vary
from 2 to 4/3. This changing noise gain modulates the effect of
the input offset voltage of the amplifier, resulting in nonlinear
DAC amplifier performance.
The AD711K with guaranteed 500 mV offset voltage minimizes
this effect to achieve 12-bit performance.
V
OUT
0.2-0.0pF
+15V
0.47 F
10k
5pF
2
1
3
Figure 7. Board Layout for Guarding Inputs
8
4
205
HP2835
7
5
V
ERROR
6
5
INPUT SELECTION
TEXTRONIX 7A26
OSCILLOSCOPE
1M
PREAMP
1
2
3
20pF
4
AD711
8
5
6
7