AD823ARZ Analog Devices Inc, AD823ARZ Datasheet - Page 14

• Manufacturer Part Number: AD823ARZ
• Description: IC OPAMP JFET R-R DUAL LN 8SOIC
• Manufacturer: Analog Devices Inc

Specifications of AD823ARZ

• Slew Rate: 25 V/µs
• Amplifier Type: J-FET
• Number Of Circuits: 2
• Output Type: Rail-to-Rail
• -3db Bandwidth: 16MHz
• Current - Input Bias: 5pA
• Voltage - Input Offset: 700µV
• Current - Supply: 7mA
• Current - Output / Channel: 17mA
• Voltage - Supply, Single/dual (±): 3 V ~ 36 V, ±1.5 V ~ 18 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (3.9mm Width)
• Op Amp Type: Precision
• No. Of Amplifiers: 2
• Bandwidth: 16MHz
• Supply Voltage Range: ± 1.5V To ± 18V
• Amplifier Case Style: SOIC
• No. Of Pins: 8
• Common Mode Rejection Ratio: 82
• Current, Input Bias: 5 pA
• Current, Input Offset: 2 pA
• Current, Output: 17 mA
• Harmonic Distortion: -90 dBc
• Impedance, Thermal: 160 °C/W
• Number Of Amplifiers: Dual
• Package Type: SOIC-8
• Resistance, Input: 10^13 Ohms
• Temperature, Operating, Range: -40 to +85 °C
• Voltage, Input: -0.2 to +3.8 V (Common-Mode)
• Voltage, Noise: 16 nV/sqrt Hz
• Voltage, Offset: 0.7 mV
• Voltage, Output, High: +14.95 V
• Voltage, Output, Low: -14.95 V
• Voltage, Supply: ±15 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Gain Bandwidth Product: -
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

AD823
OUTPUT IMPEDANCE
The low frequency open-loop output impedance of the common-
emitter output stage used in this design is approximately 30 kΩ.
Although this is significantly higher than a typical emitter
follower output stage, when it is connected with feedback, the
output impedance is reduced by the open-loop gain of the op
amp. With 109 dB of open-loop gain, the output impedance is
reduced to <0.2 Ω. At higher frequencies, the output impedance
rises as the open-loop gain of the op amp drops; however, the
output also becomes capacitive due to the integrator capacitors
C1 and C2. This prevents the output impedance from ever
becoming excessively high (see Figure 18), which can cause
stability problems when driving capacitive loads. In fact, the AD823
has excellent cap-load drive capability for a high frequency op
amp. Figure 34 shows the AD823 connected as a follower while
driving 470 pF direct capacitive load. Under these conditions,
the phase margin is approximately 20°. If greater phase margin
is desired, a small resistor can be used in series with the output
to decouple the effect of the load capacitance from the op amp
(see Figure 26). In addition, running the part at higher gains
also improves the capacitive load drive capability of the op amp.
Rev. D | Page 14 of 20
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VI
Figure 37. Small Signal Schematic
R1
R1
S1N
S1P
C5
C1
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m2
R2
C2
V
OUT