AD8250ARMZ Analog Devices Inc, AD8250ARMZ Datasheet - Page 2

IC AMP INST ICMOS LDRIFT 10MSOP

AD8250ARMZ

Manufacturer Part Number
AD8250ARMZ
Description
IC AMP INST ICMOS LDRIFT 10MSOP
Manufacturer
Analog Devices Inc
Series
iCMOS®r
Type
Instrumentation Amplifierr
Datasheet

Specifications of AD8250ARMZ

Amplifier Type
Instrumentation
Number Of Circuits
1
Output Type
Push-Pull
Slew Rate
25 V/µs
-3db Bandwidth
10MHz
Current - Input Bias
5nA
Voltage - Input Offset
70µV
Current - Supply
4.1mA
Current - Output / Channel
37mA
Voltage - Supply, Single/dual (±)
10 V ~ 30 V, ±5 V ~ 15 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
10-MSOP, Micro10™, 10-uMAX, 10-uSOP
No. Of Amplifiers
1
Gain Db Min
1dB
Gain Db Max
10dB
Bandwidth
10MHz
Amplifier Output
Single Ended
Cmrr
110dB
Supply Voltage Range
± 5V To ± 15V
Supply Current
4.1mA
Rohs Compliant
Yes
Number Of Channels
1
Number Of Elements
3
Power Supply Requirement
Dual
Common Mode Rejection Ratio
80dB
Voltage Gain Db
20dB
Input Bias Current
0.03@±15VnA
Single Supply Voltage (typ)
Not RequiredV
Dual Supply Voltage (typ)
±9/±12V
Rail/rail I/o Type
No
Single Supply Voltage (min)
Not RequiredV
Single Supply Voltage (max)
Not RequiredV
Dual Supply Voltage (min)
±5V
Dual Supply Voltage (max)
±15V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
10
Package Type
MSOP
For Use With
AD8250-EVALZ - BOARD EVALUATION AD8250
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Gain Bandwidth Product
-
Lead Free Status / Rohs Status
Compliant

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AD8250ARMZ
Manufacturer:
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Quantity:
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Part Number:
AD8250ARMZ
Manufacturer:
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Quantity:
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Part Number:
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AD8250
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 6
Pin Configuration and Function Descriptions............................. 7
Typical Performance Characteristics ............................................. 8
Theory of Operation ...................................................................... 15
REVISION HISTORY
11/10—Rev. A to Rev. B
Changes to Voltage Offset, Offset RTI V
Temperature Coefficient Parameter in Table 2............................. 3
Updated Outline Dimensions ....................................................... 22
5/08—Rev. 0 to Rev. A
Changes to Table 1............................................................................ 1
Changes to Table 2............................................................................ 3
Changes to Table 3............................................................................ 6
Added Figure 17; Renumbered Sequentially ................................ 9
Changes to Figure 23...................................................................... 10
Timing Diagram ........................................................................... 5
Maximum Power Dissipation ..................................................... 6
ESD Caution.................................................................................. 6
Gain Selection ............................................................................. 15
Power Supply Regulation and Bypassing ................................ 17
OS
, Average
Rev. B | Page 2 of 24
Applications..................................................................................... 20
Outline Dimensions ....................................................................... 22
Changes to Figure 24 to Figure 26................................................ 11
Added Figure 29 ............................................................................. 11
Changes to Figure 31...................................................................... 12
Deleted Figure 43 to Figure 46; Renumbered Sequentially ...... 14
Inserted Figure 45 and Figure 46.................................................. 14
Changes to Timing for Latched Gain Mode Section ................. 16
Changes to Layout Section and Coupling Noise Section.......... 18
Changes to Figure 59...................................................................... 21
1/07—Revision 0: Initial Version
Input Bias Current Return Path ............................................... 17
Input Protection ......................................................................... 17
Reference Terminal .................................................................... 18
Common-Mode Input Voltage Range ..................................... 18
Layout .......................................................................................... 18
RF Interference ........................................................................... 19
Driving an ADC ......................................................................... 19
Differential Output .................................................................... 20
Setting Gains with a Microcontroller ...................................... 20
Data Acquisition......................................................................... 21
Ordering Guide .......................................................................... 22

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