MCP6V01-E/SN Microchip Technology, MCP6V01-E/SN Datasheet - Page 22

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MCP6V01-E/SN

Manufacturer Part Number
MCP6V01-E/SN
Description
IC OPAMP AUTO-ZERO SNGL 8SOIC
Manufacturer
Microchip Technology
Datasheet

Specifications of MCP6V01-E/SN

Slew Rate
0.5 V/µs
Package / Case
8-SOIC (3.9mm Width)
Amplifier Type
Chopper (Zero-Drift)
Number Of Circuits
1
Output Type
Rail-to-Rail
Gain Bandwidth Product
1.3MHz
Current - Input Bias
1pA
Voltage - Input Offset
2µV
Current - Supply
300µA
Current - Output / Channel
22mA
Voltage - Supply, Single/dual (±)
1.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Number Of Channels
1
Common Mode Rejection Ratio (min)
130 dB
Input Offset Voltage
0.002 mV
Input Bias Current (max)
1 pA
Operating Supply Voltage
3 V, 5 V
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Shutdown
No
Supply Voltage (max)
5.5 V
Supply Voltage (min)
1.8 V
Technology
CMOS
Voltage Gain Db
156 dB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
MCP6V01DM-VOS - DEMO BOARD FOR MCP6V01MCP6V01RD-TCPL - REF DESIGN THERMCPL FOR MCP6V01
-3db Bandwidth
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Manufacturer
Quantity
Price
Part Number:
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MCP6V01/2/3
4.1.2
Figure 4-2
during the Normal Mode of operation (φ
capacitor (C
Since the Null Amplifier has very high gain, it
dominates the signal seen by the Main Amplifier. This
greatly reduces the impact of the Main Amplifier’s input
FIGURE 4-2:
Figure 4-3
during the Auto-zeroing Mode of operation (φ
signal goes directly through the Main Amplifier, and the
flywheel capacitor (C
tion on the Main Amplifier’s offset.
The Null Amplifier uses its own high open loop gain to
drive the voltage across C
offset voltage is almost zero. Because the principal
input is connected to V
corrects the offset at the current common mode input
voltage (V
the DC CMRR and PSRR very high also.
FIGURE 4-3:
4.1.3
The MCP6V01/2/3 op amps will show intermodulation
distortion (IMD), products when an AC signal is
present.
The signal and clock can be decomposed into sine
wave tones (Fourier series components). These tones
interact with the auto-zeroing circuitry’s non-linear
DS22058C-page 22
V
V
V
V
IN
IN
IN
IN
CM
+
+
shows the connections between amplifiers
shows the connections between amplifiers
AUTO-ZEROING ACTION
INTERMODULATION DISTORTION
(IMD)
H
) and supply voltage (V
) corrects the Null Amplifier’s input offset.
C
C
H
H
FW
Normal Mode of Operation (
Auto-zeroing Mode of Operation (
) maintains a constant correc-
IN
H
+, the auto-zeroing action
to the point where its input
Amp.
Amp.
Null
Null
DD
). This makes
1
). The hold
2
C
C
). The
FW
FW
φ
1
); Equivalent Amplifier Diagram.
φ
2
); Equivalent Diagram.
Amp.
Amp.
Main
Main
offset voltage on overall performance. Essentially, the
Null Amplifier and Main Amplifier behave as a regular
op amp with very high gain (A
voltage (V
Since these corrections happen every 100 µs, or so,
we also minimize slow errors, including offset drift with
temperature (ΔV
aging.
response to produce IMD tones at sum and difference
frequencies. IMD distortion tones are generated about
all of the square wave clock’s harmonics.
Clock randomization spreads the IMD tones across the
frequency spectrum, but cannot eliminate them. The
spread energy is low and is not correlated with the sig-
nal of interest, so it is not of concern for most precision
applications. See
OS
).
V
V
NC
NC
REF
REF
OS
Figure 2-37
/ΔT
A
© 2008 Microchip Technology Inc.
), 1/f noise, and input offset
Output
Output
Buffer
Buffer
and
OL
) and very low offset
Figure
2-38.
V
V
OUT
OUT

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