PB50 Cirrus Logic Inc, PB50 Datasheet - Page 2

IC PWR AMP 100V 2A 8PIN TO3

PB50

Manufacturer Part Number
PB50
Description
IC PWR AMP 100V 2A 8PIN TO3
Manufacturer
Cirrus Logic Inc
Series
Apex Precision Power™r
Datasheets

Specifications of PB50

Amplifier Type
Power
Number Of Circuits
1
Slew Rate
100 V/µs
-3db Bandwidth
1MHz
Voltage - Input Offset
750mV
Current - Supply
17mA
Current - Output / Channel
2A
Voltage - Supply, Single/dual (±)
60 V ~ 200 V, ±30 V ~ 100 V
Operating Temperature
-25°C ~ 85°C
Mounting Type
Through Hole
Package / Case
TO-3-8
Number Of Channels
1
Input Offset Voltage
0.00175 mV
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
Maximum Dual Supply Voltage
+/- 100 V
Minimum Operating Temperature
- 25 C
For Use With
598-1392 - KIT EVAL PB50/PB58 PWR BOOSTER
Lead Free Status / RoHS Status
Request inventory verification / RoHS compliant by exemption
Output Type
-
Gain Bandwidth Product
-
Current - Input Bias
-
Lead Free Status / Rohs Status
 Details
Other names
598-1338

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ABSOLUTE MAXIMUM RATINGS
SPECIFICATIONS
PB50
2
PARAMETER
INPUT
OFFSET VOLTAGE, initial
OFFSET VOLTAGE, vs. temperature
INPUT IMPEDANCE, DC
INPUT CAPACITANCE
CLOSED LOOP GAIN RANGE
GAIN ACCURACY, internal Rg, Rf
GAIN ACCURACY, external Rf
PHASE SHIFT
OUTPUT
VOLTAGE SWING
VOLTAGE SWING
VOLTAGE SWING
CURRENT, continuous
SLEW RATE
CAPACITIVE LOAD
SETTLING TIME to .1%
POWER BANDWIDTH
SMALL SIGNAL BANDWIDTH
SMALL SIGNAL BANDWIDTH
POWER SUPPLY
VOLTAGE, ±V
CURRENT, quiescent
THERMAL
RESISTANCE, AC junction to case
RESISTANCE, DC junction to case
RESISTANCE, junction to air
TEMPERATURE RANGE, case
NOTES: 1. Long term operation at the maximum junction temperature will result in reduced product life. Derate internal power dissipation to
CAUTION
2. The power supply voltage specified under typical (TYP) applies, T
3. +V
4. Rating applies if the output current alternates between both output transistors at a rate faster than 60Hz.
5. +V
S
achieve high MTTF (Mean Time to Failure).
3
S
S
and –V
must be at least 15V above COM, –V
The PB50 is constructed from MOSFET transistors. ESD handling procedures must be observed.
The internal substrate contains beryllia (BeO). Do not break the seal. If accidentally broken, do not crush, machine, or
subject to temperatures in excess of 850°C to avoid generating toxic fumes.
S
denote the positive and negative supply rail respectively.
4
TEST CONDITIONS
Full temperature range
A
A
F = 10kHz, AV
F = 200kHz, AV
Io = 2A
Io = 1A
Io = .1A
Full temperature range
Full temperature range
R
V
C
C
Full temperature range
V
V
V
Full temp. range, F > 60Hz
Full temp. range, F < 60Hz
Full temperature range
Meets full range specifications
V
V
C
S
S
S
L
C
C
= 3
= 10
= 100Ω, 2V step
= 100Vpp
= ±30
= ±60
= ±100
= 22pF, A
= 22pF, A
V
V
= 25, Vcc = ±100
= 3, Vcc = ±30
S
SUPPLY VOLTAGE, +V
OUTPUT CURRENT, within SOA
POWER DISSIPATION, internal at T
INPUT VOLTAGE, referred to common
TEMPERATURE, pin solder—10 sec max
TEMPERATURE, junction
TEMPERATURE, storage
OPERATING TEMPERATURE RANGE, case
CL
must be at least 30V below COM.
CL
= 10, C
= 10, C
2
C
P r o d u c t I n n o v a t i o n F r o m
C
= 22pF
= 22pF
S
C
to –V
= 25°C unless otherwise noted.
1
V
V
S
V
±30
MIN
160
–25
S
S
25
50
S
3
–11
–10
2
–8
5
C
= 25°C
1
V
V
V
2200
TYP
±.75
–4.5
±10
±15
100
320
100
±60
3.2
1.8
50
10
10
60
S
S
S
12
17
30
25
3
2
1
9
–9
–7
–5
200V
2A
35W
±15V
300°C
150°C
–65 to +150°C
–55 to +125°C
±1.75
MAX
±100
±15
±25
2.0
3.5
–7
25
12
18
25
85
UNITS
mV/°C
°C/W
°C/W
°C/W
V/µs
MHz
kHz
kHz
V/V
mA
mA
mA
pF
pF
µs
°C
%
%
V
V
V
V
A
V
PB50U
°
°

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