LMC6061AIM/NOPB National Semiconductor, LMC6061AIM/NOPB Datasheet - Page 10

• Manufacturer Part Number: LMC6061AIM/NOPB
• Description: IC OP AMP CMOS SINGL MICRO 8SOIC
• Manufacturer: National Semiconductor

Specifications of LMC6061AIM/NOPB

• Amplifier Type: General Purpose
• Number Of Circuits: 1
• Output Type: Rail-to-Rail
• Slew Rate: 0.35 V/µs
• Gain Bandwidth Product: 100kHz
• Current - Input Bias: 0.01pA
• Voltage - Input Offset: 100µV
• Current - Supply: 24µA
• Current - Output / Channel: 26mA
• Voltage - Supply, Single/dual (±): 4.5 V ~ 15.5 V, ±2.25 V ~ 7.75 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (3.9mm Width)
• Bandwidth: 100 kHz
• Common Mode Rejection Ratio: 85
• Current, Input Bias: 0.01 pA
• Current, Input Offset: 0.005 pA
• Current, Output: 22 mA
• Current, Supply: 20 μA
• Harmonic Distortion: 0.01 %
• Impedance, Thermal: 193 °C/W
• Number Of Amplifiers: Single
• Package Type: SO-8
• Resistance, Input: 10 Teraohms
• Temperature, Operating, Range: -40 to +85 °C
• Voltage, Gain: 4000 V/mV
• Voltage, Input: 4.5 to 15.5 V
• Voltage, Noise: 83 nV/sqrt Hz
• Voltage, Offset: 100 μV
• Voltage, Output, High: 4.995 V
• Voltage, Output, Low: 0.005 V
• Voltage, Supply: 5 V
• Number Of Channels: 1
• Voltage Gain Db: 132.04 dB
• Common Mode Rejection Ratio (min): 75 dB
• Input Voltage Range (max): 15.5 V
• Input Voltage Range (min): 4.5 V
• Input Offset Voltage: 0.35 mV at 5 V
• Operating Supply Voltage: 5 V, 9 V, 12 V, 15 V
• Supply Current: 0.024 mA at 5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• -3db Bandwidth: -
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device
• Other names: *LMC6061AIM; *LMC6061AIM/NOPB; LMC6061AIM

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Applications Hints
PRINTED-CIRCUIT-BOARD LAYOUT
FOR HIGH-IMPEDANCE WORK
It is generally recognized that any circuit which must operate
with less than 1000 pA of leakage current requires special
layout of the PC board. When one wishes to take advantage
of the ultra-low bias current of the LMC6061, typically less
than 10 fA, it is essential to have an excellent layout. Fortu-
nately, the techniques of obtaining low leakages are quite
simple. First, the user must not ignore the surface leakage of
the PC board, even though it may sometimes appear accept-
ably low, because under conditions of high humidity or dust
or contamination, the surface leakage will be appreciable.
To minimize the effect of any surface leakage, lay out a ring
of foil completely surrounding the LMC6061’s inputs and the
(Continued)
FIGURE 4. Example of Guard Ring in P.C. Board Layout
10
terminals of capacitors, diodes, conductors, resistors, relay
terminals etc. connected to the op-amp’s inputs, as in Figure
4 . To have a significant effect, guard rings should be placed
on both the top and bottom of the PC board. This PC foil
must then be connected to a voltage which is at the same
voltage as the amplifier inputs, since no leakage current can
flow between two points at the same potential. For example,
a PC board trace-to-pad resistance of 10
mally considered a very large resistance, could leak 5 pA if
the trace were a 5V bus adjacent to the pad of the input. This
would cause a 100 times degradation from the LMC6061’s
actual performance. However, if a guard ring is held within
5 mV of the inputs, then even a resistance of 10
cause only 0.05 pA of leakage current. See Figure 5 for
typical connections of guard rings for standard op-amp
configurations.
01142206
12
, which is nor-
11
would