MCP6232-E/SN Microchip Technology, MCP6232-E/SN Datasheet - Page 9

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MCP6232-E/SN

Manufacturer Part Number
MCP6232-E/SN
Description
IC OPAMP 1.8V DUAL R-R 8SOIC
Manufacturer
Microchip Technology
Datasheets

Specifications of MCP6232-E/SN

Slew Rate
0.15 V/µs
Package / Case
8-SOIC (3.9mm Width)
Amplifier Type
General Purpose
Number Of Circuits
2
Output Type
Rail-to-Rail
Gain Bandwidth Product
300kHz
Current - Input Bias
1pA
Voltage - Input Offset
5000µV
Current - Supply
20µA
Current - Output / Channel
23mA
Voltage - Supply, Single/dual (±)
1.8 V ~ 6 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Number Of Channels
2
Common Mode Rejection Ratio (min)
61 dB
Input Offset Voltage
5 mV
Input Bias Current (max)
1 pA
Operating Supply Voltage
3 V, 5 V
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Shutdown
No
Supply Voltage (max)
6 V
Supply Voltage (min)
1.8 V
Technology
CMOS
Voltage Gain Db
110 dB
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
-3db Bandwidth
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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4.0
4.1
To minimize the effect of input bias current in an
amplifier circuit (this is important for very high source-
impedance applications, such as pH meters and
transimpedance amplifiers), the impedance at both
inverting and non-inverting inputs needs to be
matched. This is done by choosing the circuit resistor
values so that the total resistance at each input is the
same. Figure 4-1 shows a summing amplifier circuit.
FIGURE 4-1:
To match the inputs, set all voltage sources to ground
and calculate the total resistance at the input nodes. In
this summing amplifier circuit, the resistance at the
inverting input is calculated by setting V
V
parallel. The total resistance at the inverting input is:
At the non-inverting input, V
source. When V
in parallel. The total resistance at the non-inverting
input is:
To minimize output offset voltage and increase circuit
accuracy, the resistor values need to meet the
conditions:
 2004 Microchip Technology Inc.
OUT
Where:
Where:
to ground. In this case, R
V
V
R
R
IN2
IN1
VIN –
VIN +
APPLICATION CIRCUITS
Matching the Impedance at the
Inputs
R
R
Y
X
V
= total resistance at the inverting input
= total resistance at the inverting
R
DD
R
R
VIN -
R
DD
VIN +
input
G1
G2
is set to ground, both R
R
R
=
Z
VIN +
=
Summing Amplifier Circuit.
-------------------------------------------- -
---------
R
------------------------ -
1
G1
------
R
1
MCP623X
=
+
X
+
+
1
R
R
---------
R
DD
----- -
R
VIN -
1
F
1
1
G2
G1
Y
, R
is the only voltage
+
+
----- -
R
R
1
G2
F
Z
and R
IN1
x
V
and R
, V
OUT
F
IN2
are in
y
and
are
4.2
In analog circuit design, the PCB parasitic capacitance
can compromise the circuit behavior; Figure 4-2 shows
a typical scenario. If the input of an amplifier sees
parasitic capacitance of several picofarad (C
which includes the common mode capacitance of 6 pF,
typical), and large R
of the circuit will include a zero. This parasitic zero
introduces gain peaking and can cause circuit
instability.
FIGURE 4-2:
Capacitance at the Input.
One solution is to use smaller resistor values to push
the zero to a higher frequency. Another solution is to
compensate by introducing a pole at the point at which
the zero occurs. This can be done by adding C
parallel with the feedback resistor (R
selected so that the ratio C
of R
V
V
F
AC
DC
:R
G
.
Compensating for the Parasitic
Capacitance
C
R
PARA
G
F
and R
Effect of Parasitic
MCP623X
+
MCP6231/2
PARA
R
C
G
F
F
, the frequency response
:C
C
F
F
is equal to the ratio
=
F
). C
DS21881B-page 9
C
PARA
F
V
needs to be
OUT
R
------ -
R
G
F
PARA
F
in
,

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