MCP6V02-E/MD Microchip Technology, MCP6V02-E/MD Datasheet - Page 19

no-image

MCP6V02-E/MD

Manufacturer Part Number
MCP6V02-E/MD
Description
IC OPAMP AUTO-ZERO DUAL 8DFN
Manufacturer
Microchip Technology
Datasheet

Specifications of MCP6V02-E/MD

Slew Rate
0.5 V/µs
Package / Case
8-DFN
Amplifier Type
Chopper (Zero-Drift)
Number Of Circuits
2
Output Type
Rail-to-Rail
Gain Bandwidth Product
1.3MHz
Current - Input Bias
1pA
Voltage - Input Offset
2µV
Current - Supply
300µA
Current - Output / Channel
22mA
Voltage - Supply, Single/dual (±)
1.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Number Of Channels
2
Common Mode Rejection Ratio (min)
130 dB
Input Offset Voltage
0.002 mV
Input Bias Current (max)
1 pA
Operating Supply Voltage
3 V, 5 V
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Shutdown
No
Supply Voltage (max)
5.5 V
Supply Voltage (min)
1.8 V
Technology
CMOS
Voltage Gain Db
156 dB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
-3db Bandwidth
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MCP6V02-E/MD
Manufacturer:
MICROCHIP
Quantity:
12 000
3.0
Descriptions of the pins are listed in
TABLE 3-1:
3.1
The analog output pins (V
voltage sources.
3.2
The non-inverting and inverting inputs (V
are high-impedance CMOS inputs with low bias
currents.
3.3
The positive power supply (V
than the negative power supply (V
operation, the other pins are between V
Typically, these parts are used in a single (positive)
supply configuration. In this case, V
ground and V
need bypass capacitors.
© 2008 Microchip Technology Inc.
1, 5, 8
TDFN
6
2
3
4
7
9
MCP6V01
PIN DESCRIPTIONS
Analog Outputs
Analog Inputs
Power Supply Pins
1, 5, 8
DD
SOIC
6
2
3
4
7
is connected to the supply. V
PIN FUNCTION TABLE
DFN
1
2
3
4
5
6
7
8
9
OUT
DD
MCP6V02
) is 1.8V to 5.5V higher
) are low-impedance
SS
Table
SOIC
SS
is connected to
SS
1
2
3
4
5
6
7
8
). For normal
IN
3-1.
and V
+, V
IN
DD
DD
1, 5, 8
–, …)
TDFN
6
2
3
4
7
9
.
will
MCP6V03
SOIC
1, 5
6
2
3
4
7
8
3.4
This pin (CS) is a CMOS, Schmitt-triggered input that
places the MCP6V03 op amps into a low power mode
of operation.
3.5
There is an internal connection between the Exposed
Thermal Pad (EP) and the V
nected to the same potential on the Printed Circuit
Board (PCB).
This pad can be connected to a PCB ground plane to
provide a larger heat sink. This improves the package
thermal resistance (
V
Chip Select (CS) Digital Input
Exposed Thermal Pad (EP)
V
V
OUT
IN
IN
Symbol
V
V
V
–, V
+, V
V
V
OUTB
CS
NC
INB
EP
, V
INB
DD
SS
OUTA
INA
INA
+
+
MCP6V01/2/3
θ
JA
).
Output (op amp A)
Inverting Input (op amp A)
Non-inverting Input
(op amp A)
Negative Power Supply
Non-inverting Input
(op amp B)
Inverting Input (op amp B)
Output (op amp B)
Positive Power Supply
Chip Select (op amp A)
No Internal Connection
Exposed Thermal Pad (EP);
must be connected to V
SS
pin; they must be con-
Description
DS22058C-page 19
SS

Related parts for MCP6V02-E/MD