LTC1250CS8#TRPBF Linear Technology, LTC1250CS8#TRPBF Datasheet - Page 8
![IC BRIDGE AMP ZERO-DRIFT 8-SOIC](/photos/6/62/66297/8-soic_05-08-1610_sml.jpg)
LTC1250CS8#TRPBF
Manufacturer Part Number
LTC1250CS8#TRPBF
Description
IC BRIDGE AMP ZERO-DRIFT 8-SOIC
Manufacturer
Linear Technology
Datasheet
1.LTC1250CN8PBF.pdf
(12 pages)
Specifications of LTC1250CS8#TRPBF
Amplifier Type
Chopper (Zero-Drift)
Number Of Circuits
1
Output Type
Rail-to-Rail
Slew Rate
10 V/µs
Gain Bandwidth Product
1.5MHz
Current - Input Bias
50pA
Voltage - Input Offset
5µV
Current - Supply
3mA
Voltage - Supply, Single/dual (±)
4.75 V ~ 16 V, ±2.38 V ~ 8 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Output / Channel
-
-3db Bandwidth
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
LTC1250
Single Supply Operation
The LTC1250 will operate with single supply voltages as
low as 4.5V, and the output swings to within millivolts of
either supply when lightly loaded. The input stage will
common mode to within 250mV of ground with a single
5V supply, and will common mode to ground with single
supplies above 11V. Most bridge transducers bias their
inputs above ground when powered from single supplies,
allowing them to interface directly to the LTC1250 in
single supply applications. Single-ended, ground-refer-
enced signals will need to be level shifted slightly to
interface to the LTC1250’s inputs.
Fault Conditions
The LTC1250 is designed to withstand most external fault
conditions without latch-up or damage. However, unusu-
8
A
PPLICATI
O
U
S
I FOR ATIO
U
W
U
ally severe fault conditions can destroy the part. All pins
are protected against faults of ±25mA or 5V beyond
either supply, whichever comes first. If the external
circuitry can exceed these limits, series resistors or
voltage clamp diodes should be included to prevent
damage.
The LTC1250 includes internal protection against ESD
damage. All data sheet parameters are maintained to 1kV
ESD on any pin; beyond 1kV, the input bias and offset
currents will increase, but the remaining specs are unaf-
fected and the part remains functional to 5kV at the input
pins and 8kV at the output pin. Extreme ESD conditions
should be guarded against by using standard antistatic
precautions.
1250fb