LTC2053IMS8#TRPBF Linear Technology, LTC2053IMS8#TRPBF Datasheet - Page 10

• Manufacturer Part Number: LTC2053IMS8#TRPBF
• Description: IC AMP INST 0-DRFT R-R I/O 8MSOP
• Manufacturer: Linear Technology

Specifications of LTC2053IMS8#TRPBF

• Amplifier Type: Chopper (Zero-Drift)
• Number Of Circuits: 1
• Output Type: Rail-to-Rail
• Slew Rate: 0.2 V/µs
• Gain Bandwidth Product: 200kHz
• Current - Input Bias: 4nA
• Voltage - Input Offset: 5µV
• Current - Supply: 950µA
• Voltage - Supply, Single/dual (±): 2.7 V ~ 11 V, ±1.35 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-MSOP, Micro8™, 8-uMAX, 8-uSOP,
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Output / Channel: -
• -3db Bandwidth: -

LTC2053/LTC2053-SYNC
block DiagraM
applicaTions inForMaTion
Theory of Operation
The LTC2053 uses an internal capacitor (C
a differential input signal riding on a DC common mode
voltage (see the Block Diagram). This capacitor’s charge is
transferred to a second internal hold capacitor (C
lating the common mode of the input differential signal to
that of the REF pin. The resulting signal is amplified by a
zero-drift op amp in the noninverting configuration. The
RG pin is the negative input of this op amp and allows
external programmability of the DC gain. Simple filtering
can be realized by using an external capacitor across the
feedback resistor.
Input Voltage Range
The input common mode voltage range of the LTC2053
is rail-to-rail. However, the following equation limits the
size of the differential input voltage:
Where V
pins, respectively, V
V
For example, with a 3V single supply and a 0V to 100mV
differential input voltage, V
1.6V.
0
+
V
is the positive supply voltage.
–
≤ (V
+ IN
+ IN
and V
– V
– IN
– IN
) + V
REF
are the voltages of the +IN and –IN
is the voltage at the REF pin and
REF
REF
≤ V
must be between 0V and
+
– 1.3
*NOTE: PIN 1 IS EN ON THE LTC2053 AND CLK ON THE LTC2053-SYNC
3
2
+IN
–IN
S
) to sample
H
C
) trans-
S
5
REF
C
H
6
RG
±5 Volt Operation
When using the LTC2053 with supplies over 5.5V, care
must be taken to limit the maximum difference between
any of the input pins (+IN or –IN) and the REF pin to
5.5V; if not, the device will be damaged. For example, if
rail-to-rail input operation is desired when the supplies
are at ±5V, the REF pin should be 0V, ±0.5V. As a second
example, if V
should not exceed 5.5V.
Settling Time
The sampling rate is 3kHz and the input sampling period
during which C
V
input sampling period, C
C
N bits of accuracy at the op amp noninverting input after
N clock cycles or 333µs(N). The settling time at the OUT
pin is also affected by the settling of the internal op amp.
Since the gain bandwidth of the internal op amp is typically
200kHz, the settling time is dominated by the switched
capacitor front end for gains below 100 (see the Typical
Performance Characteristics section).
IN
S
+
–
= C
8
4
is approximately 150µs. First assume that on each
V
V
ZERO-DRIFT
+
–
OP AMP
H
1
(= 1000pF), a change in the input will settle to
EN/CLK*
OUT
+
2053 BD
is 10V and V
S
is charged to the input differential voltage
7
S
–
is charged fully to V
and REF are at 0V, the inputs
IN
. Since
2053syncfc