AD826ARZ-REEL7 Analog Devices Inc, AD826ARZ-REEL7 Datasheet - Page 11

IC OPAMP VF 50MHZ DUAL LP 8SOIC

AD826ARZ-REEL7

Manufacturer Part Number
AD826ARZ-REEL7
Description
IC OPAMP VF 50MHZ DUAL LP 8SOIC
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD826ARZ-REEL7

Slew Rate
350 V/µs
Amplifier Type
Voltage Feedback
Number Of Circuits
2
Gain Bandwidth Product
50MHz
-3db Bandwidth
50MHz
Current - Input Bias
3.3µA
Voltage - Input Offset
500µV
Current - Supply
6.6mA
Current - Output / Channel
50mA
Voltage - Supply, Single/dual (±)
5 V ~ 36 V, ±2.5 V ~ 18 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Op Amp Type
High Speed
No. Of Amplifiers
2
Bandwidth
50MHz
Supply Voltage Range
5V To 36V
Amplifier Case Style
SOIC
No. Of Pins
8
Operating Temperature Range
-40°C To +85°C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Output Type
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

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REV. C
An exciting feature of the AD826 is its ability to perform well in a
single supply configuration (see Figure 37). The AD826 is ideally
suited for applications that require low power dissipation and high
output current and those which need to drive large capacitive
loads, such as high speed buffering and instrumentation.
Referring to Figure 36, careful consideration should be given to
the proper selection of component values. The choices for this
particular circuit are: (R1 + R3) R2 combine with C1 to form a
low frequency corner of approximately 30 Hz.
PARALLEL AMPS PROVIDE 100 mA TO LOAD
By taking advantage of the superior matching characteristics of
the AD826, enhanced performance can easily be achieved by
employing the circuit in Figure 38. Here, two identical cells are
paralleled to obtain even higher load driving capability than that
of a single amplifier (100 mA min guaranteed). R1 and R2 are
included to limit current flow between amplifier outputs that
would arise in the presence of any residual mismatch.
SINGLE SUPPLY OPERATION
0.1 F
V
IN
C2
1 F
C1
R3
1k
R1
9k
R2
10k
AD826
1/2
V
S
3.3 F
0.01 F
0.1 F
150
R
C3
L
C
200pF
C
L
OUT
V
OUT
R3 and C2 reduce the effect of the power supply changes on the
output by low-pass filtering with a corner at
The values for R
AD826’s exceptional output drive capability. In this configura-
tion, the output is centered around 2.5 V. In order to eliminate
the static dc current associated with this level, C3 was inserted
in series with R
100
90
10
0%
1k
1k
V
IN
L
.
L
500mV
and C
500mV
–V
1/2
AD826
1/2
AD826
V
S
S
L
1k
1k
were chosen to demonstrate the
0.1 F
0.1 F
1 F
1 F
100ns
5
R1
5
R2
2πR
1
V
3
AD826
C
OUT
2
.
R
L

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