OP2177AR Analog Devices Inc, OP2177AR Datasheet - Page 18
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OP2177AR
Manufacturer Part Number
OP2177AR
Description
IC OPAMP GP 1.3MHZ DUAL LN 8SOIC
Manufacturer
Analog Devices Inc
Datasheet
1.OP2177ARZ.pdf
(24 pages)
Specifications of OP2177AR
Slew Rate
0.7 V/µs
Rohs Status
RoHS non-compliant
Design Resources
16-Bit Fully Isolated Voltage Output Module Using AD5662, ADuM1401, and External Amplifiers (CN0063)
Amplifier Type
General Purpose
Number Of Circuits
2
Gain Bandwidth Product
1.3MHz
Current - Input Bias
500pA
Voltage - Input Offset
15µV
Current - Supply
400µA
Current - Output / Channel
10mA
Voltage - Supply, Single/dual (±)
5 V ~ 36 V, ±2.5 V ~ 18 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
No. Of Amplifiers
2
Bandwidth
1.3MHz
No. Of Pins
8
Peak Reflow Compatible (260 C)
No
Input Bias Current
2nA
Input Offset Voltage Max
75V
Common Mode Ratio
126
Output Type
-
-3db Bandwidth
-
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
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OP1177/OP2177/OP4177
PROPER BOARD LAYOUT
The OPx177 is a high precision device. To ensure optimum
performance at the PCB level, care must be taken in the design
of the board layout.
To avoid leakage currents, the surface of the board should be
kept clean and free of moisture. Coating the surface creates a
barrier to moisture accumulation and helps reduce parasitic
resistance on the board.
Keeping supply traces short and properly bypassing the power
supplies minimizes power supply disturbances due to output
current variation, such as when driving an ac signal into a heavy
load. Bypass capacitors should be connected as closely as possible
to the device supply pins. Stray capacitances are a concern at the
outputs and the inputs of the amplifier. It is recommended that
signal traces be kept at least 5 mm from supply lines to
minimize coupling.
A variation in temperature across the PCB can cause a mismatch in
the Seebeck voltages at solder joints and other points where dissi-
milar metals are in contact, resulting in thermal voltage errors. To
minimize these thermocouple effects, orient resistors so heat
sources warm both ends equally. Input signal paths should contain
matching numbers and types of components, where possible to
match the number and type of thermocouple junctions. For
example, dummy components such as zero value resistors can
be used to match real resistors in the opposite input path.
Matching components should be located in close proximity and
should be oriented in the same manner. Ensure leads are of equal
length so that thermal conduction is in equilibrium. Keep heat
sources on the PCB as far away from amplifier input circuitry as
is practical.
The use of a ground plane is highly recommended. A ground
plane reduces EMI noise and also helps to maintain a constant
temperature across the circuit board.
DIFFERENCE AMPLIFIERS
Difference amplifiers are used in high accuracy circuits to improve
the common-mode rejection ratio (CMRR).
V1
V2
R3 = R1
R1
Figure 63. Difference Amplifier
R4
R3
=
R2
R1
2
3
OP1177
100kΩ
R4 = R1
R2
7
4
V+
V–
6
V
OUT
Rev. G | Page 18 of 24
In the single instrumentation amplifier (see Figure 63), where
a mismatch between the ratio R2/R1 and R4/R3 causes the
common-mode rejection ratio to be reduced.
To better understand this effect, consider that, by definition,
where ADM is the differential gain and ACM is the common-
mode gain.
For this circuit to act as a difference amplifier, its output must
be proportional to the differential input signal.
From Figure 63,
Arranging terms and combining the previous equations yields
The sensitivity of CMRR with respect to the R1 is obtained by
taking the derivative of CMRR, in Equation 1, with respect to R1.
Assuming that
and
the worst-case CMRR error arises when
V
V
V
R1 ≈ R2 ≈ R3 ≈ R4 ≈ R
R(1 − δ) < R1, R2, R3, R4 < R(1 + δ)
R1 = R4 = R(1 + δ) and R2 = R3 = R(1 − δ)
CMRR =
CMRR
A
R4
R3
δ
δ
O
O
CMRR
CMRR
DIFF
DM
δ
δ
=
=
R1
R1
=
=
=
−
R2
R1
R2
R1
⎛
⎜
⎝
V
=
V
V
R2
R1
(
DIFF
=
=
1
A
A
V
R4R1
O
−
DM
CM
2
δ
2
⎞
⎟
⎠
V
δ
R1
−
V
2
−
and
2
R4R1
V
1
(
and
+
2
1
+
⎛
⎜
⎝
R1R4
1
R2R3
)
R3R2
2
⎡
⎢
⎢
⎢
⎢
⎣
A
⎛ +
⎜
⎝
⎛ +
⎜
⎝
R1R4
V
CM
−
1
1
CM
2
)
R2R3
R1R4
=
+
R2
R1
R3
R4
=
2
−
V
R4R2
V
2
⎞
⎟
⎠
⎞
⎟
⎠
CM
1
2
R2R3
O
⎤
⎥
⎥
⎥
⎥
⎦
(
V
V
1
2
+
+
V
2
2
2
R1R4
)
R2R4
−
+
2
R2R3
R2R3
⎞
⎟
⎠
(1)