AD627ARZ Analog Devices Inc, AD627ARZ Datasheet - Page 12

• Manufacturer Part Number: AD627ARZ
• Description: IC AMP INST R-R 25MA 8SOIC
• Manufacturer: Analog Devices Inc
• Type: Rail-to-Railr

Specifications of AD627ARZ

• Slew Rate: 0.06 V/µs
• Amplifier Type: Instrumentation
• Number Of Circuits: 1
• Output Type: Rail-to-Rail
• -3db Bandwidth: 80kHz
• Current - Input Bias: 2nA
• Voltage - Input Offset: 25µV
• Current - Supply: 60µA
• Current - Output / Channel: 25mA
• Voltage - Supply, Single/dual (±): 2.2 V ~ 36 V, ±1.1 V ~ 18 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (3.9mm Width)
• No. Of Amplifiers: 1
• Input Offset Voltage: 200µV
• Gain Db Min: 5dB
• Gain Db Max: 1000dB
• Bandwidth: 40MHz
• Amplifier Output: Rail To Rail
• Cmrr: 77dB
• Supply Voltage Range: ± 1.1V To ±
• Common Mode Rejection Ratio: 90
• Current, Input Bias: 3 nA (Single), 2 nA (Dual)
• Current, Input Offset: 0.3 nA
• Current, Supply: 60 μA
• Impedance, Thermal: 155 °C/W
• Package Type: SOIC-8
• Power Dissipation: 0.8 W
• Resistance, Input: 20 Gigaohms (Differential), 20 Gigaohms (Common-Mode)
• Temperature, Operating, Range: -40 to +85 °C
• Voltage, Gain: 1000 V/V
• Voltage, Input: -35.9 to +35 V (Single), -17.9 to +17 V (Dual)
• Voltage, Input Offset: 50 μV (Single), 25 μV (Dual)
• Voltage, Noise: 38 nV/sqrt Hz
• Voltage, Supply: 2.2 to ±18 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Gain Bandwidth Product: -
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

AD627
2 V or 1 V to maximize the available gain and output swing.
Note that in most cases, there is no advantage to increasing the
single supply to greater than 5 V (the exception being an input
range of 0 V to 1 V).
Output Buffering
The AD627 is designed to drive loads of 20 kΩ or greater but
can deliver up to 20 mA to heavier loads at lower output voltage
swings (see TPC 6). If more than 20 mA of output current is
required at the output, the AD627’s output should be buffered
with a precision op amp such as the OP113 as shown in Figure 7
(shown for the single supply case). This op amp can swing from
0 V to 4 V on its output while driving a load as small as 600 Ω.
–1
–2
–3
–4
–5
5
4
3
2
1
0
5
4
3
2
1
0
–0.5
V
–6
IN
±
–5
R
0
G
0.5
–4
MAXIMUM V
MAXIMUM V
AD627
–V
S
0.1 F
0.1 F
–3
1
REF
V
V
1.5
–2
IN
REF
REF
IN
+V
(–) – Volts
(–) – Volts
S
–1
2
MINIMUM V
OP113
2.5
–V
0
MINIMUM V
S
0.1 F
0.1 F
REF
1
3
3.5
REF
2
3
4
V
OUT
4.5
4
INPUT AND OUTPUT OFFSET ERRORS
The low errors of the AD627 are attributed to two sources, input
and output errors. The output error is divided by G when
referred to the input. In practice, the input errors dominate at
high gains and the output errors dominate at low gains. The
total offset error for a given gain is calculated as:
RTI offset errors and noise voltages for different gains are
shown below in Table III.
Gain AD627A AD627B AD627A
+5
+10
+20
+50
+100 270
+500 252
+1000 251
Make vs. Buy: A Typical Application Error Budget
The example in Figure 8 serves as a good comparison between
the errors associated with an integrated and a discrete in amp
implementation. A ± 100 mV signal from a resistive bridge
(common-mode voltage = 2.5 V) is to be amplified. This example
compares the resulting errors from a discrete two op amp in
amp and from the AD627. The discrete implementation uses a
four-resistor precision network (1% match, 50 ppm/°C tracking).
The errors associated with each implementation are detailed in
Table IV and show the integrated in amp to be more precise,
both at ambient and over temperature. It should be noted that
the discrete implementation is also more expensive. This is pri-
marily due to the relatively high cost of the low drift precision
resistor network.
Note, the input offset current of the discrete in amp implemen-
tation is the difference in the bias currents of the two op amps,
not the offset currents of the individual op amps. Also, while the
values of the resistor network are chosen so that the inverting
and noninverting inputs of each op amp see the same impedance
(about 350 Ω), the offset current of each op amp will add an
additional error which must be characterized.
Errors Due to AC CMRR
In Table IV, the error due to common-mode rejection is the
error that results from the common-mode voltage from the
bridge 2.5 V. The ac error due to nonideal common-mode
rejection cannot be calculated without knowing the size of the ac
common-mode voltage (usually interference from 50 Hz/60 Hz
mains frequencies).
A mismatch of 0.1% between the four gain setting resistors will
determine the low frequency CMRR of a two op amp in amp.
The plot in Figure 8 shows the practical results, at ambient
temperature, of resistor mismatch. The CMRR of the circuit in
Figure 9 (Gain = +11) was measured using four resistors which
Total Error RTI = Input Error + (Output Error/Gain)
Max Total
RTI Offset Error
450
350
300
270
Total Error RTO = (Input Error × G) + Output Error
V
250
200
175
160
155
151
151
Table III. RTI Error Sources
V
Max Total
RTI Offset Drift
5
4
3.5
3.2
3.1
3
3
V/ C
AD627B AD627A & AD627B
3
2
1.5
1.2
1.1
1
1
V/ C
Total RTI Noise
nV/
95
66
56
53
52
52
52
√
Hz