AD8556ARZ Analog Devices Inc, AD8556ARZ Datasheet
AD8556ARZ
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AD8556ARZ Summary of contents
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FEATURES EMI filters at input pins Specified from −40°C to +140°C Low offset voltage: 10 µV max Low input offset voltage drift: 65 nV/°C max High CMRR min Digitally programmable gain and output offset voltage Programmable output clamp ...
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AD8556 TABLE OF CONTENTS Specifications..................................................................................... 4 Absolute Maximum Ratings............................................................ 6 Thermal Resistance ...................................................................... 6 ESD Caution.................................................................................. 6 Pin Configurations and Function Descriptions ........................... 7 Typical Performance Characteristics ............................................. 8 Theory of Operation ...................................................................... 16 Gain Values.................................................................................. 17 REVISION HISTORY 5/05—Revision ...
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GENERAL DESCRIPTION The AD8556 is a zero-drift, sensor signal amplifier with digitally programmable gain and output offset. Designed to easily and accurately convert variable pressure sensor and strain bridge outputs to a well-defined output voltage range, the AD8556 accurately amplifies ...
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AD8556 SPECIFICATIONS VDD = 5.0 V, VSS = 0 2 Table 1. Electrical Specifications Parameter INPUT STAGE Input Offset Voltage Input Offset Voltage Drift Input Bias Current Input Offset Current Input Voltage Range Common-Mode ...
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Parameter DYNAMIC PERFORMANCE Gain Bandwidth Product Output Buffer Slew Rate Settling Time NOISE PERFORMANCE Input Referred Noise Low Frequency Noise Total Harmonic Distortion DIGITAL INTERFACE Input Current DIGIN Pulse Width to Load 0 DIGIN Pulse Width to Load 1 Time ...
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AD8556 ABSOLUTE MAXIMUM RATINGS Table 2. Parameter Rating Supply Voltage 6 V Input Voltage VSS − 0 VDD + 0 Differential Input Voltage ±5.0 V Output Short-Circuit Duration to Indefinite VSS or VDD Storage Temperature Range ...
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PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS VDD 1 8 AD8556 FILT/DIGOUT 2 7 TOP VIEW DIGIN 3 6 (Not to Scale) VNEG 4 5 Figure 2. 8-Lead SOIC_N Pin Configuration Table 4. Pin Function Descriptions Pin No. Mnemonic SOIC_N LFCSP_VQ 1 ...
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AD8556 TYPICAL PERFORMANCE CHARACTERISTICS N: 363, 100 MEAN: –0.389938, SD: 1.65684 –10 – (µV) OS Figure 4. Input Offset Voltage Distribution 2.0 1.5 1.0 0.5 0 –0.5 –1.0 –1.5 –2.0 –2.5 –3.0 ...
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I – (V) CM Figure 10. Input Bias Current at VPOS, VNEG vs. Common-Mode Voltage 0.8 0.6 0.5 0.3 0.2 0 –0.2 –0.3 –0.5 –0.6 –0.8 –50 –25 ...
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AD8556 120 100 1k 10k FREQUENCY (Hz) Figure 16. CMRR vs. Frequency 120 80 0 100 1k 10k FREQUENCY (Hz) Figure 17. CMRR vs. Frequency 145 135 GAIN = 1280 125 115 105 95 GAIN = 200 ...
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Figure 22. Low Frequency Input Voltage Noise (0 Hz) GAIN = 1280 60 40 GAIN = 10k 100k FREQUENCY (Hz) Figure 23. Closed-Loop Gain vs. Frequency Measured at Filter Pin GAIN = 1280 ...
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AD8556 1.000 SOURCE 0.100 0.010 0.001 0.01 0.10 LOAD CURRENT (mA) Figure 28. Output Voltage to Supply Rail vs. Load Current 15 12 SINK –3 –6 SOURCE 5V –9 –12 –15 –75 –50 –25 0 ...
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V = 2.7V TO 2.5V S 120 100 0.01 0 FREQUENCY (kHz) Figure 34. PSRR vs. Frequency T 2 TIME (100µs/DIV) Figure 35. Small Signal Response T 2 TIME (100µs/DIV) Figure 36. ...
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AD8556 OUT CH1 50.0mV CH2 2.00V M 1.00µs Figure 40. Negative Overload Recovery (Gain = 70 OUT 0V 2 CH1 50.0mV CH2 2.00V M 1.00µs Figure 41. Positive ...
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FREQUENCY (Hz) Figure 46. THD vs. Frequency V = ±2. 10k 20k Rev Page AD8556 ...
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AD8556 THEORY OF OPERATION A1, A2, R1, R2, R3, P1, and P2 form the first gain stage of the differential amplifier. A1 and A2 are auto-zeroed op amps that minimize input offset errors. P1 and P2 are digital potentiome- ters, ...
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GAIN VALUES Table 5. First Stage Gain vs. First Stage Gain Code First Stage First Stage Gain Code First Stage Gain Gain Code 0 4.000 32 1 4.015 33 2 4.030 34 3 4.045 35 4 4.060 36 5 4.075 ...
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AD8556 OPEN WIRE FAULT DETECTION The inputs to A1 and A2, VNEG and VPOS, each have a com- parator to detect whether VNEG or VPOS exceeds a threshold voltage, nominally VDD − 2 (VNEG > VDD − 2.0 ...
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WAVEFORM CODE 0 1 Table 9. Timing Specifications Timing Parameter Description t Pulse Width for Loading 0 into Shift Register w0 t Pulse Width for Loading 1 into Shift Register w1 t Width Between ...
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AD8556 Initial State Initially, all the polysilicon fuses are intact. Each parameter has the value 0 assigned (see Table 11). Table 11. Initial State Before Programming Second Stage Gain Code = 0 Second Stage Gain = 17.5 First stage gain ...
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Parity Error Detection A parity check is used to determine whether the programmed data of an AD8556 is valid, or whether data corruption ...
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AD8556 Signal PAR_SUM is the output of the 2-input exclusive-OR gate (Cell EOR2). After the master fuse is blown, set PARITY_ERROR to PAR_SUM. As mentioned earlier, the AD8556 behaves as a programmed amplifier when PARITY_ERROR = 0 (no parity error). ...
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Important: Once a programming attempt has been made for any fuse, there should be no further attempt to blow that fuse fuse does not program to the expected state, discard the unit. The expected incidence rate of attempted ...
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AD8556 EMI/RFI PERFORMANCE Real world applications must work with ever increasing radio/magnetic frequency interference (RFI and EMI). In situations where signal strength is low and transmission lines are long, instrumentation amplifiers such as AD8556 are needed to extract weak, small ...
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In order to show the benefits that the AD8556 brings to new applications where EMI/RFI signals are present, a part was programmed with a gain of 70, dc offset = 2 produce test ...
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... AD8556ARZ-REEL7 −40°C to +140°C 1 AD8556ACPZ-R2 −40°C to +140°C 1 AD8556ACPZ-REEL −40°C to +140°C 1 AD8556ACPZ-REEL7 −40°C to +140°C 1 AD8556ARZ-EVAL Pb-free part. 5.00 (0.1968) 4.80 (0.1890 6.20 (0.2440) 4.00 (0.1574) 5.80 (0.2284) 3.80 (0.1497 1.27 (0.0500) BSC 1 ...
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NOTES Rev Page AD8556 ...
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AD8556 NOTES ©2005 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D05448–0–5/05(0) Rev Page ...